aarch32.c File Reference

#include <linux/kvm_host.h>
#include <asm/kvm_emulate.h>
#include <asm/kvm_hyp.h>

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Functions
bool	kvm_condition_valid32 (const struct kvm_vcpu *vcpu)
static void	kvm_adjust_itstate (struct kvm_vcpu *vcpu)
void	kvm_skip_instr32 (struct kvm_vcpu *vcpu)

Variables
static const unsigned short	cc_map [16]

Function Documentation

kvm_adjust_itstate()

static void kvm_adjust_itstate ( struct kvm_vcpu *  vcpu )

static

adjust_itstate - adjust ITSTATE when emulating instructions in IT-block @vcpu: The VCPU pointer

When exceptions occur while instructions are executed in Thumb IF-THEN blocks, the ITSTATE field of the CPSR is not advanced (updated), so we have to do this little bit of work manually. The fields map like this:

IT[7:0] -> CPSR[26:25],CPSR[15:10]

Definition at line 96 of file aarch32.c.

{
    unsigned long itbits, cond;
    unsigned long cpsr = *vcpu_cpsr(vcpu);
    bool is_arm = !(cpsr & PSR_AA32_T_BIT);
 
    if (is_arm || !(cpsr & PSR_AA32_IT_MASK))
        return;
 
    cond = (cpsr & 0xe000) >> 13;
    itbits = (cpsr & 0x1c00) >> (10 - 2);
    itbits |= (cpsr & (0x3 << 25)) >> 25;
 
    /* Perform ITAdvance (see page A2-52 in ARM DDI 0406C) */
    if ((itbits & 0x7) == 0)
        itbits = cond = 0;
    else
        itbits = (itbits << 1) & 0x1f;
 
    cpsr &= ~PSR_AA32_IT_MASK;
    cpsr |= cond << 13;
    cpsr |= (itbits & 0x1c) << (10 - 2);
    cpsr |= (itbits & 0x3) << 25;
    *vcpu_cpsr(vcpu) = cpsr;
}

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kvm_condition_valid32()

bool kvm_condition_valid32

(

const struct kvm_vcpu *

vcpu

)

Definition at line 47 of file aarch32.c.

{
    unsigned long cpsr;
    u32 cpsr_cond;
    int cond;
 
    /* Top two bits non-zero?  Unconditional. */
    if (kvm_vcpu_get_esr(vcpu) >> 30)
        return true;
 
    /* Is condition field valid? */
    cond = kvm_vcpu_get_condition(vcpu);
    if (cond == 0xE)
        return true;
 
    cpsr = *vcpu_cpsr(vcpu);
 
    if (cond < 0) {
        /* This can happen in Thumb mode: examine IT state. */
        unsigned long it;
 
        it = ((cpsr >> 8) & 0xFC) | ((cpsr >> 25) & 0x3);
 
        /* it == 0 => unconditional. */
        if (it == 0)
            return true;
 
        /* The cond for this insn works out as the top 4 bits. */
        cond = (it >> 4);
    }
 
    cpsr_cond = cpsr >> 28;
 
    if (!((cc_map[cond] >> cpsr_cond) & 1))
        return false;
 
    return true;
}

kvm_skip_instr32()

void kvm_skip_instr32

(

struct kvm_vcpu *

vcpu

)

kvm_skip_instr - skip a trapped instruction and proceed to the next @vcpu: The vcpu pointer

Definition at line 126 of file aarch32.c.

{
    u32 pc = *vcpu_pc(vcpu);
    bool is_thumb;
 
    is_thumb = !!(*vcpu_cpsr(vcpu) & PSR_AA32_T_BIT);
    if (is_thumb && !kvm_vcpu_trap_il_is32bit(vcpu))
        pc += 2;
    else
        pc += 4;
 
    *vcpu_pc(vcpu) = pc;
 
    kvm_adjust_itstate(vcpu);
}

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Variable Documentation

cc_map

const unsigned short cc_map[16]

static

Initial value:

= {
    0xF0F0,         
    0x0F0F,         
    0xCCCC,         
    0x3333,         
    0xFF00,         
    0x00FF,         
    0xAAAA,         
    0x5555,         
    0x0C0C,         
    0xF3F3,         
    0xAA55,         
    0x55AA,         
    0x0A05,         
    0xF5FA,         
    0xFFFF,         
    0           
}

Definition at line 25 of file aarch32.c.