KVM
Macros | Functions | Variables
sys_regs.c File Reference
#include <linux/irqchip/arm-gic-v3.h>
#include <asm/kvm_asm.h>
#include <asm/kvm_mmu.h>
#include <hyp/adjust_pc.h>
#include <nvhe/fixed_config.h>
#include "../../sys_regs.h"
Include dependency graph for sys_regs.c:

Go to the source code of this file.

Macros

#define AARCH32(REG)   { SYS_DESC(REG), .access = pvm_access_id_aarch32 }
 
#define AARCH64(REG)   { SYS_DESC(REG), .access = pvm_access_id_aarch64 }
 
#define ID_UNALLOCATED(crm, op2)
 
#define RAZ_WI(REG)   { SYS_DESC(REG), .access = pvm_access_raz_wi }
 
#define HOST_HANDLED(REG)   { SYS_DESC(REG), .access = NULL }
 

Functions

static void inject_undef64 (struct kvm_vcpu *vcpu)
 
static u64 get_restricted_features_unsigned (u64 sys_reg_val, u64 restrict_fields)
 
static u64 get_pvm_id_aa64pfr0 (const struct kvm_vcpu *vcpu)
 
static u64 get_pvm_id_aa64pfr1 (const struct kvm_vcpu *vcpu)
 
static u64 get_pvm_id_aa64zfr0 (const struct kvm_vcpu *vcpu)
 
static u64 get_pvm_id_aa64dfr0 (const struct kvm_vcpu *vcpu)
 
static u64 get_pvm_id_aa64dfr1 (const struct kvm_vcpu *vcpu)
 
static u64 get_pvm_id_aa64afr0 (const struct kvm_vcpu *vcpu)
 
static u64 get_pvm_id_aa64afr1 (const struct kvm_vcpu *vcpu)
 
static u64 get_pvm_id_aa64isar0 (const struct kvm_vcpu *vcpu)
 
static u64 get_pvm_id_aa64isar1 (const struct kvm_vcpu *vcpu)
 
static u64 get_pvm_id_aa64isar2 (const struct kvm_vcpu *vcpu)
 
static u64 get_pvm_id_aa64mmfr0 (const struct kvm_vcpu *vcpu)
 
static u64 get_pvm_id_aa64mmfr1 (const struct kvm_vcpu *vcpu)
 
static u64 get_pvm_id_aa64mmfr2 (const struct kvm_vcpu *vcpu)
 
u64 pvm_read_id_reg (const struct kvm_vcpu *vcpu, u32 id)
 
static u64 read_id_reg (const struct kvm_vcpu *vcpu, struct sys_reg_desc const *r)
 
static bool pvm_access_raz_wi (struct kvm_vcpu *vcpu, struct sys_reg_params *p, const struct sys_reg_desc *r)
 
static bool pvm_access_id_aarch32 (struct kvm_vcpu *vcpu, struct sys_reg_params *p, const struct sys_reg_desc *r)
 
static bool pvm_access_id_aarch64 (struct kvm_vcpu *vcpu, struct sys_reg_params *p, const struct sys_reg_desc *r)
 
static bool pvm_gic_read_sre (struct kvm_vcpu *vcpu, struct sys_reg_params *p, const struct sys_reg_desc *r)
 
int kvm_check_pvm_sysreg_table (void)
 
bool kvm_handle_pvm_sysreg (struct kvm_vcpu *vcpu, u64 *exit_code)
 
bool kvm_handle_pvm_restricted (struct kvm_vcpu *vcpu, u64 *exit_code)
 

Variables

u64 id_aa64pfr0_el1_sys_val
 
u64 id_aa64pfr1_el1_sys_val
 
u64 id_aa64isar0_el1_sys_val
 
u64 id_aa64isar1_el1_sys_val
 
u64 id_aa64isar2_el1_sys_val
 
u64 id_aa64mmfr0_el1_sys_val
 
u64 id_aa64mmfr1_el1_sys_val
 
u64 id_aa64mmfr2_el1_sys_val
 
u64 id_aa64smfr0_el1_sys_val
 
static const struct sys_reg_desc pvm_sys_reg_descs []
 

Macro Definition Documentation

◆ AARCH32

#define AARCH32 (   REG)    { SYS_DESC(REG), .access = pvm_access_id_aarch32 }

Definition at line 316 of file sys_regs.c.

◆ AARCH64

#define AARCH64 (   REG)    { SYS_DESC(REG), .access = pvm_access_id_aarch64 }

Definition at line 319 of file sys_regs.c.

◆ HOST_HANDLED

#define HOST_HANDLED (   REG)    { SYS_DESC(REG), .access = NULL }

Definition at line 335 of file sys_regs.c.

◆ ID_UNALLOCATED

#define ID_UNALLOCATED (   crm,
  op2 
)
Value:
{ \
Op0(3), Op1(0), CRn(0), CRm(crm), Op2(op2), \
.access = pvm_access_id_aarch64, \
}
static bool pvm_access_id_aarch64(struct kvm_vcpu *vcpu, struct sys_reg_params *p, const struct sys_reg_desc *r)
Definition: sys_regs.c:291
#define CRm(_x)
Definition: sys_regs.h:240
#define Op1(_x)
Definition: sys_regs.h:238
#define Op2(_x)
Definition: sys_regs.h:241
#define CRn(_x)
Definition: sys_regs.h:239

Definition at line 326 of file sys_regs.c.

◆ RAZ_WI

#define RAZ_WI (   REG)    { SYS_DESC(REG), .access = pvm_access_raz_wi }

Definition at line 332 of file sys_regs.c.

Function Documentation

◆ get_pvm_id_aa64afr0()

static u64 get_pvm_id_aa64afr0 ( const struct kvm_vcpu *  vcpu)
static

Definition at line 138 of file sys_regs.c.

139 {
140  /*
141  * No support for implementation defined features, therefore, hyp has no
142  * sanitized copy of the feature id register.
143  */
144  BUILD_BUG_ON(PVM_ID_AA64AFR0_ALLOW != 0ULL);
145  return 0;
146 }
#define PVM_ID_AA64AFR0_ALLOW
Definition: fixed_config.h:164
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◆ get_pvm_id_aa64afr1()

static u64 get_pvm_id_aa64afr1 ( const struct kvm_vcpu *  vcpu)
static

Definition at line 148 of file sys_regs.c.

149 {
150  /*
151  * No support for implementation defined features, therefore, hyp has no
152  * sanitized copy of the feature id register.
153  */
154  BUILD_BUG_ON(PVM_ID_AA64AFR1_ALLOW != 0ULL);
155  return 0;
156 }
#define PVM_ID_AA64AFR1_ALLOW
Definition: fixed_config.h:165
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◆ get_pvm_id_aa64dfr0()

static u64 get_pvm_id_aa64dfr0 ( const struct kvm_vcpu *  vcpu)
static

Definition at line 118 of file sys_regs.c.

119 {
120  /*
121  * No support for debug, including breakpoints, and watchpoints,
122  * therefore, pKVM has no sanitized copy of the feature id register.
123  */
124  BUILD_BUG_ON(PVM_ID_AA64DFR0_ALLOW != 0ULL);
125  return 0;
126 }
#define PVM_ID_AA64DFR0_ALLOW
Definition: fixed_config.h:158
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◆ get_pvm_id_aa64dfr1()

static u64 get_pvm_id_aa64dfr1 ( const struct kvm_vcpu *  vcpu)
static

Definition at line 128 of file sys_regs.c.

129 {
130  /*
131  * No support for debug, therefore, hyp has no sanitized copy of the
132  * feature id register.
133  */
134  BUILD_BUG_ON(PVM_ID_AA64DFR1_ALLOW != 0ULL);
135  return 0;
136 }
#define PVM_ID_AA64DFR1_ALLOW
Definition: fixed_config.h:159
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◆ get_pvm_id_aa64isar0()

static u64 get_pvm_id_aa64isar0 ( const struct kvm_vcpu *  vcpu)
static

Definition at line 158 of file sys_regs.c.

159 {
161 }
#define PVM_ID_AA64ISAR0_ALLOW
Definition: fixed_config.h:170
u64 id_aa64isar0_el1_sys_val
Definition: sys_regs.c:23
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◆ get_pvm_id_aa64isar1()

static u64 get_pvm_id_aa64isar1 ( const struct kvm_vcpu *  vcpu)
static

Definition at line 163 of file sys_regs.c.

164 {
165  u64 allow_mask = PVM_ID_AA64ISAR1_ALLOW;
166 
167  if (!vcpu_has_ptrauth(vcpu))
168  allow_mask &= ~(ARM64_FEATURE_MASK(ID_AA64ISAR1_EL1_APA) |
169  ARM64_FEATURE_MASK(ID_AA64ISAR1_EL1_API) |
170  ARM64_FEATURE_MASK(ID_AA64ISAR1_EL1_GPA) |
171  ARM64_FEATURE_MASK(ID_AA64ISAR1_EL1_GPI));
172 
173  return id_aa64isar1_el1_sys_val & allow_mask;
174 }
#define PVM_ID_AA64ISAR1_ALLOW
Definition: fixed_config.h:197
u64 id_aa64isar1_el1_sys_val
Definition: sys_regs.c:24
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◆ get_pvm_id_aa64isar2()

static u64 get_pvm_id_aa64isar2 ( const struct kvm_vcpu *  vcpu)
static

Definition at line 176 of file sys_regs.c.

177 {
178  u64 allow_mask = PVM_ID_AA64ISAR2_ALLOW;
179 
180  if (!vcpu_has_ptrauth(vcpu))
181  allow_mask &= ~(ARM64_FEATURE_MASK(ID_AA64ISAR2_EL1_APA3) |
182  ARM64_FEATURE_MASK(ID_AA64ISAR2_EL1_GPA3));
183 
184  return id_aa64isar2_el1_sys_val & allow_mask;
185 }
#define PVM_ID_AA64ISAR2_ALLOW
Definition: fixed_config.h:212
u64 id_aa64isar2_el1_sys_val
Definition: sys_regs.c:25
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◆ get_pvm_id_aa64mmfr0()

static u64 get_pvm_id_aa64mmfr0 ( const struct kvm_vcpu *  vcpu)
static

Definition at line 187 of file sys_regs.c.

188 {
189  u64 set_mask;
190 
193 
194  return (id_aa64mmfr0_el1_sys_val & PVM_ID_AA64MMFR0_ALLOW) | set_mask;
195 }
#define PVM_ID_AA64MMFR0_RESTRICT_UNSIGNED
Definition: fixed_config.h:93
#define PVM_ID_AA64MMFR0_ALLOW
Definition: fixed_config.h:81
u64 id_aa64mmfr0_el1_sys_val
Definition: sys_regs.c:26
static u64 get_restricted_features_unsigned(u64 sys_reg_val, u64 restrict_fields)
Definition: sys_regs.c:58
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◆ get_pvm_id_aa64mmfr1()

static u64 get_pvm_id_aa64mmfr1 ( const struct kvm_vcpu *  vcpu)
static

Definition at line 197 of file sys_regs.c.

198 {
200 }
#define PVM_ID_AA64MMFR1_ALLOW
Definition: fixed_config.h:108
u64 id_aa64mmfr1_el1_sys_val
Definition: sys_regs.c:27
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◆ get_pvm_id_aa64mmfr2()

static u64 get_pvm_id_aa64mmfr2 ( const struct kvm_vcpu *  vcpu)
static

Definition at line 202 of file sys_regs.c.

203 {
205 }
#define PVM_ID_AA64MMFR2_ALLOW
Definition: fixed_config.h:129
u64 id_aa64mmfr2_el1_sys_val
Definition: sys_regs.c:28
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◆ get_pvm_id_aa64pfr0()

static u64 get_pvm_id_aa64pfr0 ( const struct kvm_vcpu *  vcpu)
static

Definition at line 86 of file sys_regs.c.

87 {
88  u64 set_mask = 0;
89  u64 allow_mask = PVM_ID_AA64PFR0_ALLOW;
90 
93 
94  return (id_aa64pfr0_el1_sys_val & allow_mask) | set_mask;
95 }
#define PVM_ID_AA64PFR0_ALLOW
Definition: fixed_config.h:38
#define PVM_ID_AA64PFR0_RESTRICT_UNSIGNED
Definition: fixed_config.h:54
u64 id_aa64pfr0_el1_sys_val
Definition: sys_regs.c:21
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◆ get_pvm_id_aa64pfr1()

static u64 get_pvm_id_aa64pfr1 ( const struct kvm_vcpu *  vcpu)
static

Definition at line 97 of file sys_regs.c.

98 {
99  const struct kvm *kvm = (const struct kvm *)kern_hyp_va(vcpu->kvm);
100  u64 allow_mask = PVM_ID_AA64PFR1_ALLOW;
101 
102  if (!kvm_has_mte(kvm))
103  allow_mask &= ~ARM64_FEATURE_MASK(ID_AA64PFR1_EL1_MTE);
104 
105  return id_aa64pfr1_el1_sys_val & allow_mask;
106 }
#define PVM_ID_AA64PFR1_ALLOW
Definition: fixed_config.h:67
u64 id_aa64pfr1_el1_sys_val
Definition: sys_regs.c:22
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◆ get_pvm_id_aa64zfr0()

static u64 get_pvm_id_aa64zfr0 ( const struct kvm_vcpu *  vcpu)
static

Definition at line 108 of file sys_regs.c.

109 {
110  /*
111  * No support for Scalable Vectors, therefore, hyp has no sanitized
112  * copy of the feature id register.
113  */
114  BUILD_BUG_ON(PVM_ID_AA64ZFR0_ALLOW != 0ULL);
115  return 0;
116 }
#define PVM_ID_AA64ZFR0_ALLOW
Definition: fixed_config.h:147
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◆ get_restricted_features_unsigned()

static u64 get_restricted_features_unsigned ( u64  sys_reg_val,
u64  restrict_fields 
)
static

Definition at line 58 of file sys_regs.c.

60 {
61  u64 value = 0UL;
62  u64 mask = GENMASK_ULL(ARM64_FEATURE_FIELD_BITS - 1, 0);
63 
64  /*
65  * According to the Arm Architecture Reference Manual, feature fields
66  * use increasing values to indicate increases in functionality.
67  * Iterate over the restricted feature fields and calculate the minimum
68  * unsigned value between the one supported by the system, and what the
69  * value is being restricted to.
70  */
71  while (sys_reg_val && restrict_fields) {
72  value |= min(sys_reg_val & mask, restrict_fields & mask);
73  sys_reg_val &= ~mask;
74  restrict_fields &= ~mask;
75  mask <<= ARM64_FEATURE_FIELD_BITS;
76  }
77 
78  return value;
79 }
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◆ inject_undef64()

static void inject_undef64 ( struct kvm_vcpu *  vcpu)
static

Definition at line 35 of file sys_regs.c.

36 {
37  u64 esr = (ESR_ELx_EC_UNKNOWN << ESR_ELx_EC_SHIFT);
38 
39  *vcpu_pc(vcpu) = read_sysreg_el2(SYS_ELR);
40  *vcpu_cpsr(vcpu) = read_sysreg_el2(SYS_SPSR);
41 
42  kvm_pend_exception(vcpu, EXCEPT_AA64_EL1_SYNC);
43 
44  __kvm_adjust_pc(vcpu);
45 
46  write_sysreg_el1(esr, SYS_ESR);
47  write_sysreg_el1(read_sysreg_el2(SYS_ELR), SYS_ELR);
48  write_sysreg_el2(*vcpu_pc(vcpu), SYS_ELR);
49  write_sysreg_el2(*vcpu_cpsr(vcpu), SYS_SPSR);
50 }
void __kvm_adjust_pc(struct kvm_vcpu *vcpu)
Definition: exception.c:365
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◆ kvm_check_pvm_sysreg_table()

int kvm_check_pvm_sysreg_table ( void  )

Definition at line 456 of file sys_regs.c.

457 {
458  unsigned int i;
459 
460  for (i = 1; i < ARRAY_SIZE(pvm_sys_reg_descs); i++) {
461  if (cmp_sys_reg(&pvm_sys_reg_descs[i-1], &pvm_sys_reg_descs[i]) >= 0)
462  return 1;
463  }
464 
465  return 0;
466 }
static const struct sys_reg_desc pvm_sys_reg_descs[]
Definition: sys_regs.c:344
static int cmp_sys_reg(const struct sys_reg_desc *i1, const struct sys_reg_desc *i2)
Definition: sys_regs.h:189
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◆ kvm_handle_pvm_restricted()

bool kvm_handle_pvm_restricted ( struct kvm_vcpu *  vcpu,
u64 *  exit_code 
)

Definition at line 512 of file sys_regs.c.

513 {
514  inject_undef64(vcpu);
515  return true;
516 }
static void inject_undef64(struct kvm_vcpu *vcpu)
Definition: sys_regs.c:35
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◆ kvm_handle_pvm_sysreg()

bool kvm_handle_pvm_sysreg ( struct kvm_vcpu *  vcpu,
u64 *  exit_code 
)

Definition at line 474 of file sys_regs.c.

475 {
476  const struct sys_reg_desc *r;
477  struct sys_reg_params params;
478  unsigned long esr = kvm_vcpu_get_esr(vcpu);
479  int Rt = kvm_vcpu_sys_get_rt(vcpu);
480 
481  params = esr_sys64_to_params(esr);
482  params.regval = vcpu_get_reg(vcpu, Rt);
483 
484  r = find_reg(&params, pvm_sys_reg_descs, ARRAY_SIZE(pvm_sys_reg_descs));
485 
486  /* Undefined (RESTRICTED). */
487  if (r == NULL) {
488  inject_undef64(vcpu);
489  return true;
490  }
491 
492  /* Handled by the host (HOST_HANDLED) */
493  if (r->access == NULL)
494  return false;
495 
496  /* Handled by hyp: skip instruction if instructed to do so. */
497  if (r->access(vcpu, &params, r))
498  __kvm_skip_instr(vcpu);
499 
500  if (!params.is_write)
501  vcpu_set_reg(vcpu, Rt, params.regval);
502 
503  return true;
504 }
static void __kvm_skip_instr(struct kvm_vcpu *vcpu)
Definition: adjust_pc.h:33
bool(* access)(struct kvm_vcpu *, struct sys_reg_params *, const struct sys_reg_desc *)
Definition: sys_regs.h:70
#define esr_sys64_to_params(esr)
Definition: sys_regs.h:37
static const struct sys_reg_desc * find_reg(const struct sys_reg_params *params, const struct sys_reg_desc table[], unsigned int num)
Definition: sys_regs.h:217
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◆ pvm_access_id_aarch32()

static bool pvm_access_id_aarch32 ( struct kvm_vcpu *  vcpu,
struct sys_reg_params p,
const struct sys_reg_desc r 
)
static

Definition at line 265 of file sys_regs.c.

268 {
269  if (p->is_write) {
270  inject_undef64(vcpu);
271  return false;
272  }
273 
274  /*
275  * No support for AArch32 guests, therefore, pKVM has no sanitized copy
276  * of AArch32 feature id registers.
277  */
278  BUILD_BUG_ON(FIELD_GET(ARM64_FEATURE_MASK(ID_AA64PFR0_EL1_EL1),
279  PVM_ID_AA64PFR0_RESTRICT_UNSIGNED) > ID_AA64PFR0_EL1_ELx_64BIT_ONLY);
280 
281  return pvm_access_raz_wi(vcpu, p, r);
282 }
static bool pvm_access_raz_wi(struct kvm_vcpu *vcpu, struct sys_reg_params *p, const struct sys_reg_desc *r)
Definition: sys_regs.c:250
bool is_write
Definition: sys_regs.h:27
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◆ pvm_access_id_aarch64()

static bool pvm_access_id_aarch64 ( struct kvm_vcpu *  vcpu,
struct sys_reg_params p,
const struct sys_reg_desc r 
)
static

Definition at line 291 of file sys_regs.c.

294 {
295  if (p->is_write) {
296  inject_undef64(vcpu);
297  return false;
298  }
299 
300  p->regval = read_id_reg(vcpu, r);
301  return true;
302 }
static u64 read_id_reg(const struct kvm_vcpu *vcpu, struct sys_reg_desc const *r)
Definition: sys_regs.c:243
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◆ pvm_access_raz_wi()

static bool pvm_access_raz_wi ( struct kvm_vcpu *  vcpu,
struct sys_reg_params p,
const struct sys_reg_desc r 
)
static

Definition at line 250 of file sys_regs.c.

252 {
253  if (!p->is_write)
254  p->regval = 0;
255 
256  return true;
257 }
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◆ pvm_gic_read_sre()

static bool pvm_gic_read_sre ( struct kvm_vcpu *  vcpu,
struct sys_reg_params p,
const struct sys_reg_desc r 
)
static

Definition at line 304 of file sys_regs.c.

307 {
308  /* pVMs only support GICv3. 'nuf said. */
309  if (!p->is_write)
310  p->regval = ICC_SRE_EL1_DIB | ICC_SRE_EL1_DFB | ICC_SRE_EL1_SRE;
311 
312  return true;
313 }

◆ pvm_read_id_reg()

u64 pvm_read_id_reg ( const struct kvm_vcpu *  vcpu,
u32  id 
)

Definition at line 208 of file sys_regs.c.

209 {
210  switch (id) {
211  case SYS_ID_AA64PFR0_EL1:
212  return get_pvm_id_aa64pfr0(vcpu);
213  case SYS_ID_AA64PFR1_EL1:
214  return get_pvm_id_aa64pfr1(vcpu);
215  case SYS_ID_AA64ZFR0_EL1:
216  return get_pvm_id_aa64zfr0(vcpu);
217  case SYS_ID_AA64DFR0_EL1:
218  return get_pvm_id_aa64dfr0(vcpu);
219  case SYS_ID_AA64DFR1_EL1:
220  return get_pvm_id_aa64dfr1(vcpu);
221  case SYS_ID_AA64AFR0_EL1:
222  return get_pvm_id_aa64afr0(vcpu);
223  case SYS_ID_AA64AFR1_EL1:
224  return get_pvm_id_aa64afr1(vcpu);
225  case SYS_ID_AA64ISAR0_EL1:
226  return get_pvm_id_aa64isar0(vcpu);
227  case SYS_ID_AA64ISAR1_EL1:
228  return get_pvm_id_aa64isar1(vcpu);
229  case SYS_ID_AA64ISAR2_EL1:
230  return get_pvm_id_aa64isar2(vcpu);
231  case SYS_ID_AA64MMFR0_EL1:
232  return get_pvm_id_aa64mmfr0(vcpu);
233  case SYS_ID_AA64MMFR1_EL1:
234  return get_pvm_id_aa64mmfr1(vcpu);
235  case SYS_ID_AA64MMFR2_EL1:
236  return get_pvm_id_aa64mmfr2(vcpu);
237  default:
238  /* Unhandled ID register, RAZ */
239  return 0;
240  }
241 }
static u64 get_pvm_id_aa64mmfr1(const struct kvm_vcpu *vcpu)
Definition: sys_regs.c:197
static u64 get_pvm_id_aa64afr0(const struct kvm_vcpu *vcpu)
Definition: sys_regs.c:138
static u64 get_pvm_id_aa64dfr1(const struct kvm_vcpu *vcpu)
Definition: sys_regs.c:128
static u64 get_pvm_id_aa64dfr0(const struct kvm_vcpu *vcpu)
Definition: sys_regs.c:118
static u64 get_pvm_id_aa64isar1(const struct kvm_vcpu *vcpu)
Definition: sys_regs.c:163
static u64 get_pvm_id_aa64afr1(const struct kvm_vcpu *vcpu)
Definition: sys_regs.c:148
static u64 get_pvm_id_aa64zfr0(const struct kvm_vcpu *vcpu)
Definition: sys_regs.c:108
static u64 get_pvm_id_aa64mmfr0(const struct kvm_vcpu *vcpu)
Definition: sys_regs.c:187
static u64 get_pvm_id_aa64isar0(const struct kvm_vcpu *vcpu)
Definition: sys_regs.c:158
static u64 get_pvm_id_aa64mmfr2(const struct kvm_vcpu *vcpu)
Definition: sys_regs.c:202
static u64 get_pvm_id_aa64pfr0(const struct kvm_vcpu *vcpu)
Definition: sys_regs.c:86
static u64 get_pvm_id_aa64isar2(const struct kvm_vcpu *vcpu)
Definition: sys_regs.c:176
static u64 get_pvm_id_aa64pfr1(const struct kvm_vcpu *vcpu)
Definition: sys_regs.c:97
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◆ read_id_reg()

static u64 read_id_reg ( const struct kvm_vcpu *  vcpu,
struct sys_reg_desc const *  r 
)
static

Definition at line 243 of file sys_regs.c.

245 {
246  return pvm_read_id_reg(vcpu, reg_to_encoding(r));
247 }
u64 pvm_read_id_reg(const struct kvm_vcpu *vcpu, u32 id)
Definition: sys_regs.c:208
#define reg_to_encoding(x)
Definition: sys_regs.h:16
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Variable Documentation

◆ id_aa64isar0_el1_sys_val

u64 id_aa64isar0_el1_sys_val

Definition at line 23 of file sys_regs.c.

◆ id_aa64isar1_el1_sys_val

u64 id_aa64isar1_el1_sys_val

Definition at line 24 of file sys_regs.c.

◆ id_aa64isar2_el1_sys_val

u64 id_aa64isar2_el1_sys_val

Definition at line 25 of file sys_regs.c.

◆ id_aa64mmfr0_el1_sys_val

u64 id_aa64mmfr0_el1_sys_val

Definition at line 26 of file sys_regs.c.

◆ id_aa64mmfr1_el1_sys_val

u64 id_aa64mmfr1_el1_sys_val

Definition at line 27 of file sys_regs.c.

◆ id_aa64mmfr2_el1_sys_val

u64 id_aa64mmfr2_el1_sys_val

Definition at line 28 of file sys_regs.c.

◆ id_aa64pfr0_el1_sys_val

u64 id_aa64pfr0_el1_sys_val

Definition at line 21 of file sys_regs.c.

◆ id_aa64pfr1_el1_sys_val

u64 id_aa64pfr1_el1_sys_val

Definition at line 22 of file sys_regs.c.

◆ id_aa64smfr0_el1_sys_val

u64 id_aa64smfr0_el1_sys_val

Definition at line 29 of file sys_regs.c.

◆ pvm_sys_reg_descs

const struct sys_reg_desc pvm_sys_reg_descs[]
static

Definition at line 304 of file sys_regs.c.