KVM
hyperv_evmcs.h
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1 /* SPDX-License-Identifier: GPL-2.0 */
2 /*
3  * This file contains common definitions for working with Enlightened VMCS which
4  * are used both by Hyper-V on KVM and KVM on Hyper-V.
5  */
6 #ifndef __KVM_X86_VMX_HYPERV_EVMCS_H
7 #define __KVM_X86_VMX_HYPERV_EVMCS_H
8 
9 #include <asm/hyperv-tlfs.h>
10 
11 #include "capabilities.h"
12 #include "vmcs12.h"
13 
14 #define KVM_EVMCS_VERSION 1
15 
16 /*
17  * Enlightened VMCSv1 doesn't support these:
18  *
19  * POSTED_INTR_NV = 0x00000002,
20  * GUEST_INTR_STATUS = 0x00000810,
21  * APIC_ACCESS_ADDR = 0x00002014,
22  * POSTED_INTR_DESC_ADDR = 0x00002016,
23  * EOI_EXIT_BITMAP0 = 0x0000201c,
24  * EOI_EXIT_BITMAP1 = 0x0000201e,
25  * EOI_EXIT_BITMAP2 = 0x00002020,
26  * EOI_EXIT_BITMAP3 = 0x00002022,
27  * GUEST_PML_INDEX = 0x00000812,
28  * PML_ADDRESS = 0x0000200e,
29  * VM_FUNCTION_CONTROL = 0x00002018,
30  * EPTP_LIST_ADDRESS = 0x00002024,
31  * VMREAD_BITMAP = 0x00002026,
32  * VMWRITE_BITMAP = 0x00002028,
33  *
34  * TSC_MULTIPLIER = 0x00002032,
35  * PLE_GAP = 0x00004020,
36  * PLE_WINDOW = 0x00004022,
37  * VMX_PREEMPTION_TIMER_VALUE = 0x0000482E,
38  *
39  * Currently unsupported in KVM:
40  * GUEST_IA32_RTIT_CTL = 0x00002814,
41  */
42 #define EVMCS1_SUPPORTED_PINCTRL \
43  (PIN_BASED_ALWAYSON_WITHOUT_TRUE_MSR | \
44  PIN_BASED_EXT_INTR_MASK | \
45  PIN_BASED_NMI_EXITING | \
46  PIN_BASED_VIRTUAL_NMIS)
47 
48 #define EVMCS1_SUPPORTED_EXEC_CTRL \
49  (CPU_BASED_ALWAYSON_WITHOUT_TRUE_MSR | \
50  CPU_BASED_HLT_EXITING | \
51  CPU_BASED_CR3_LOAD_EXITING | \
52  CPU_BASED_CR3_STORE_EXITING | \
53  CPU_BASED_UNCOND_IO_EXITING | \
54  CPU_BASED_MOV_DR_EXITING | \
55  CPU_BASED_USE_TSC_OFFSETTING | \
56  CPU_BASED_MWAIT_EXITING | \
57  CPU_BASED_MONITOR_EXITING | \
58  CPU_BASED_INVLPG_EXITING | \
59  CPU_BASED_RDPMC_EXITING | \
60  CPU_BASED_INTR_WINDOW_EXITING | \
61  CPU_BASED_CR8_LOAD_EXITING | \
62  CPU_BASED_CR8_STORE_EXITING | \
63  CPU_BASED_RDTSC_EXITING | \
64  CPU_BASED_TPR_SHADOW | \
65  CPU_BASED_USE_IO_BITMAPS | \
66  CPU_BASED_MONITOR_TRAP_FLAG | \
67  CPU_BASED_USE_MSR_BITMAPS | \
68  CPU_BASED_NMI_WINDOW_EXITING | \
69  CPU_BASED_PAUSE_EXITING | \
70  CPU_BASED_ACTIVATE_SECONDARY_CONTROLS)
71 
72 #define EVMCS1_SUPPORTED_2NDEXEC \
73  (SECONDARY_EXEC_VIRTUALIZE_X2APIC_MODE | \
74  SECONDARY_EXEC_WBINVD_EXITING | \
75  SECONDARY_EXEC_ENABLE_VPID | \
76  SECONDARY_EXEC_ENABLE_EPT | \
77  SECONDARY_EXEC_UNRESTRICTED_GUEST | \
78  SECONDARY_EXEC_DESC | \
79  SECONDARY_EXEC_ENABLE_RDTSCP | \
80  SECONDARY_EXEC_ENABLE_INVPCID | \
81  SECONDARY_EXEC_ENABLE_XSAVES | \
82  SECONDARY_EXEC_RDSEED_EXITING | \
83  SECONDARY_EXEC_RDRAND_EXITING | \
84  SECONDARY_EXEC_TSC_SCALING | \
85  SECONDARY_EXEC_ENABLE_USR_WAIT_PAUSE | \
86  SECONDARY_EXEC_PT_USE_GPA | \
87  SECONDARY_EXEC_PT_CONCEAL_VMX | \
88  SECONDARY_EXEC_BUS_LOCK_DETECTION | \
89  SECONDARY_EXEC_NOTIFY_VM_EXITING | \
90  SECONDARY_EXEC_ENCLS_EXITING)
91 
92 #define EVMCS1_SUPPORTED_3RDEXEC (0ULL)
93 
94 #define EVMCS1_SUPPORTED_VMEXIT_CTRL \
95  (VM_EXIT_ALWAYSON_WITHOUT_TRUE_MSR | \
96  VM_EXIT_SAVE_DEBUG_CONTROLS | \
97  VM_EXIT_ACK_INTR_ON_EXIT | \
98  VM_EXIT_HOST_ADDR_SPACE_SIZE | \
99  VM_EXIT_LOAD_IA32_PERF_GLOBAL_CTRL | \
100  VM_EXIT_SAVE_IA32_PAT | \
101  VM_EXIT_LOAD_IA32_PAT | \
102  VM_EXIT_SAVE_IA32_EFER | \
103  VM_EXIT_LOAD_IA32_EFER | \
104  VM_EXIT_CLEAR_BNDCFGS | \
105  VM_EXIT_PT_CONCEAL_PIP | \
106  VM_EXIT_CLEAR_IA32_RTIT_CTL)
107 
108 #define EVMCS1_SUPPORTED_VMENTRY_CTRL \
109  (VM_ENTRY_ALWAYSON_WITHOUT_TRUE_MSR | \
110  VM_ENTRY_LOAD_DEBUG_CONTROLS | \
111  VM_ENTRY_IA32E_MODE | \
112  VM_ENTRY_LOAD_IA32_PERF_GLOBAL_CTRL | \
113  VM_ENTRY_LOAD_IA32_PAT | \
114  VM_ENTRY_LOAD_IA32_EFER | \
115  VM_ENTRY_LOAD_BNDCFGS | \
116  VM_ENTRY_PT_CONCEAL_PIP | \
117  VM_ENTRY_LOAD_IA32_RTIT_CTL)
118 
119 #define EVMCS1_SUPPORTED_VMFUNC (0)
120 
121 struct evmcs_field {
122  u16 offset;
124 };
125 
126 extern const struct evmcs_field vmcs_field_to_evmcs_1[];
127 extern const unsigned int nr_evmcs_1_fields;
128 
129 static __always_inline int evmcs_field_offset(unsigned long field,
130  u16 *clean_field)
131 {
132  const struct evmcs_field *evmcs_field;
133  unsigned int index = ROL16(field, 6);
134 
135  if (unlikely(index >= nr_evmcs_1_fields))
136  return -ENOENT;
137 
139 
140  /*
141  * Use offset=0 to detect holes in eVMCS. This offset belongs to
142  * 'revision_id' but this field has no encoding and is supposed to
143  * be accessed directly.
144  */
145  if (unlikely(!evmcs_field->offset))
146  return -ENOENT;
147 
148  if (clean_field)
150 
151  return evmcs_field->offset;
152 }
153 
154 static inline u64 evmcs_read_any(struct hv_enlightened_vmcs *evmcs,
155  unsigned long field, u16 offset)
156 {
157  /*
158  * vmcs12_read_any() doesn't care whether the supplied structure
159  * is 'struct vmcs12' or 'struct hv_enlightened_vmcs' as it takes
160  * the exact offset of the required field, use it for convenience
161  * here.
162  */
163  return vmcs12_read_any((void *)evmcs, field, offset);
164 }
165 
166 #endif /* __KVM_X86_VMX_HYPERV_H */
const unsigned int nr_evmcs_1_fields
Definition: hyperv_evmcs.c:315
static __always_inline int evmcs_field_offset(unsigned long field, u16 *clean_field)
Definition: hyperv_evmcs.h:129
static u64 evmcs_read_any(struct hv_enlightened_vmcs *evmcs, unsigned long field, u16 offset)
Definition: hyperv_evmcs.h:154
const struct evmcs_field vmcs_field_to_evmcs_1[]
Definition: hyperv_evmcs.c:13
static u64 vmcs12_read_any(struct vmcs12 *vmcs12, unsigned long field, u16 offset)
Definition: vmcs12.h:385
#define ROL16(val, n)
Definition: vmcs.h:14