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vgic-mmio.h File Reference
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Classes

struct  vgic_register_region
 

Macros

#define VGIC_ACCESS_8bit   1
 
#define VGIC_ACCESS_32bit   2
 
#define VGIC_ACCESS_64bit   4
 
#define VGIC_ADDR_IRQ_MASK(bits)   (((bits) * 1024 / 8) - 1)
 
#define VGIC_ADDR_TO_INTID(addr, bits)
 
#define REGISTER_DESC_WITH_BITS_PER_IRQ(off, rd, wr, ur, uw, bpi, acc)
 
#define REGISTER_DESC_WITH_LENGTH(off, rd, wr, length, acc)
 
#define REGISTER_DESC_WITH_LENGTH_UACCESS(off, rd, wr, urd, uwr, length, acc)
 

Functions

unsigned long vgic_data_mmio_bus_to_host (const void *val, unsigned int len)
 
void vgic_data_host_to_mmio_bus (void *buf, unsigned int len, unsigned long data)
 
unsigned long extract_bytes (u64 data, unsigned int offset, unsigned int num)
 
u64 update_64bit_reg (u64 reg, unsigned int offset, unsigned int len, unsigned long val)
 
unsigned long vgic_mmio_read_raz (struct kvm_vcpu *vcpu, gpa_t addr, unsigned int len)
 
unsigned long vgic_mmio_read_rao (struct kvm_vcpu *vcpu, gpa_t addr, unsigned int len)
 
void vgic_mmio_write_wi (struct kvm_vcpu *vcpu, gpa_t addr, unsigned int len, unsigned long val)
 
int vgic_mmio_uaccess_write_wi (struct kvm_vcpu *vcpu, gpa_t addr, unsigned int len, unsigned long val)
 
unsigned long vgic_mmio_read_group (struct kvm_vcpu *vcpu, gpa_t addr, unsigned int len)
 
void vgic_mmio_write_group (struct kvm_vcpu *vcpu, gpa_t addr, unsigned int len, unsigned long val)
 
unsigned long vgic_mmio_read_enable (struct kvm_vcpu *vcpu, gpa_t addr, unsigned int len)
 
void vgic_mmio_write_senable (struct kvm_vcpu *vcpu, gpa_t addr, unsigned int len, unsigned long val)
 
void vgic_mmio_write_cenable (struct kvm_vcpu *vcpu, gpa_t addr, unsigned int len, unsigned long val)
 
int vgic_uaccess_write_senable (struct kvm_vcpu *vcpu, gpa_t addr, unsigned int len, unsigned long val)
 
int vgic_uaccess_write_cenable (struct kvm_vcpu *vcpu, gpa_t addr, unsigned int len, unsigned long val)
 
unsigned long vgic_mmio_read_pending (struct kvm_vcpu *vcpu, gpa_t addr, unsigned int len)
 
unsigned long vgic_uaccess_read_pending (struct kvm_vcpu *vcpu, gpa_t addr, unsigned int len)
 
void vgic_mmio_write_spending (struct kvm_vcpu *vcpu, gpa_t addr, unsigned int len, unsigned long val)
 
void vgic_mmio_write_cpending (struct kvm_vcpu *vcpu, gpa_t addr, unsigned int len, unsigned long val)
 
int vgic_uaccess_write_spending (struct kvm_vcpu *vcpu, gpa_t addr, unsigned int len, unsigned long val)
 
int vgic_uaccess_write_cpending (struct kvm_vcpu *vcpu, gpa_t addr, unsigned int len, unsigned long val)
 
unsigned long vgic_mmio_read_active (struct kvm_vcpu *vcpu, gpa_t addr, unsigned int len)
 
unsigned long vgic_uaccess_read_active (struct kvm_vcpu *vcpu, gpa_t addr, unsigned int len)
 
void vgic_mmio_write_cactive (struct kvm_vcpu *vcpu, gpa_t addr, unsigned int len, unsigned long val)
 
void vgic_mmio_write_sactive (struct kvm_vcpu *vcpu, gpa_t addr, unsigned int len, unsigned long val)
 
int vgic_mmio_uaccess_write_cactive (struct kvm_vcpu *vcpu, gpa_t addr, unsigned int len, unsigned long val)
 
int vgic_mmio_uaccess_write_sactive (struct kvm_vcpu *vcpu, gpa_t addr, unsigned int len, unsigned long val)
 
unsigned long vgic_mmio_read_priority (struct kvm_vcpu *vcpu, gpa_t addr, unsigned int len)
 
void vgic_mmio_write_priority (struct kvm_vcpu *vcpu, gpa_t addr, unsigned int len, unsigned long val)
 
unsigned long vgic_mmio_read_config (struct kvm_vcpu *vcpu, gpa_t addr, unsigned int len)
 
void vgic_mmio_write_config (struct kvm_vcpu *vcpu, gpa_t addr, unsigned int len, unsigned long val)
 
int vgic_uaccess (struct kvm_vcpu *vcpu, struct vgic_io_device *dev, bool is_write, int offset, u32 *val)
 
u32 vgic_read_irq_line_level_info (struct kvm_vcpu *vcpu, u32 intid)
 
void vgic_write_irq_line_level_info (struct kvm_vcpu *vcpu, u32 intid, const u32 val)
 
unsigned int vgic_v2_init_dist_iodev (struct vgic_io_device *dev)
 
unsigned int vgic_v3_init_dist_iodev (struct vgic_io_device *dev)
 
u64 vgic_sanitise_outer_cacheability (u64 reg)
 
u64 vgic_sanitise_inner_cacheability (u64 reg)
 
u64 vgic_sanitise_shareability (u64 reg)
 
u64 vgic_sanitise_field (u64 reg, u64 field_mask, int field_shift, u64(*sanitise_fn)(u64))
 
const struct vgic_register_regionvgic_find_mmio_region (const struct vgic_register_region *regions, int nr_regions, unsigned int offset)
 

Variables

const struct kvm_io_device_ops kvm_io_gic_ops
 

Macro Definition Documentation

◆ REGISTER_DESC_WITH_BITS_PER_IRQ

#define REGISTER_DESC_WITH_BITS_PER_IRQ (   off,
  rd,
  wr,
  ur,
  uw,
  bpi,
  acc 
)
Value:
{ \
.reg_offset = off, \
.bits_per_irq = bpi, \
.len = bpi * 1024 / 8, \
.access_flags = acc, \
.read = rd, \
.write = wr, \
.uaccess_read = ur, \
.uaccess_write = uw, \
}

Definition at line 67 of file vgic-mmio.h.

◆ REGISTER_DESC_WITH_LENGTH

#define REGISTER_DESC_WITH_LENGTH (   off,
  rd,
  wr,
  length,
  acc 
)
Value:
{ \
.reg_offset = off, \
.bits_per_irq = 0, \
.len = length, \
.access_flags = acc, \
.read = rd, \
.write = wr, \
}

Definition at line 79 of file vgic-mmio.h.

◆ REGISTER_DESC_WITH_LENGTH_UACCESS

#define REGISTER_DESC_WITH_LENGTH_UACCESS (   off,
  rd,
  wr,
  urd,
  uwr,
  length,
  acc 
)
Value:
{ \
.reg_offset = off, \
.bits_per_irq = 0, \
.len = length, \
.access_flags = acc, \
.read = rd, \
.write = wr, \
.uaccess_read = urd, \
.uaccess_write = uwr, \
}

Definition at line 89 of file vgic-mmio.h.

◆ VGIC_ACCESS_32bit

#define VGIC_ACCESS_32bit   2

Definition at line 40 of file vgic-mmio.h.

◆ VGIC_ACCESS_64bit

#define VGIC_ACCESS_64bit   4

Definition at line 41 of file vgic-mmio.h.

◆ VGIC_ACCESS_8bit

#define VGIC_ACCESS_8bit   1

Definition at line 39 of file vgic-mmio.h.

◆ VGIC_ADDR_IRQ_MASK

#define VGIC_ADDR_IRQ_MASK (   bits)    (((bits) * 1024 / 8) - 1)

Definition at line 48 of file vgic-mmio.h.

◆ VGIC_ADDR_TO_INTID

#define VGIC_ADDR_TO_INTID (   addr,
  bits 
)
Value:
(((addr) & VGIC_ADDR_IRQ_MASK(bits)) * \
8 >> ilog2(bits))
#define VGIC_ADDR_IRQ_MASK(bits)
Definition: vgic-mmio.h:48

Definition at line 58 of file vgic-mmio.h.

Function Documentation

◆ extract_bytes()

unsigned long extract_bytes ( u64  data,
unsigned int  offset,
unsigned int  num 
)

Definition at line 22 of file vgic-mmio-v3.c.

24 {
25  return (data >> (offset * 8)) & GENMASK_ULL(num * 8 - 1, 0);
26 }
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◆ update_64bit_reg()

u64 update_64bit_reg ( u64  reg,
unsigned int  offset,
unsigned int  len,
unsigned long  val 
)

Definition at line 29 of file vgic-mmio-v3.c.

31 {
32  int lower = (offset & 4) * 8;
33  int upper = lower + 8 * len - 1;
34 
35  reg &= ~GENMASK_ULL(upper, lower);
36  val &= GENMASK_ULL(len * 8 - 1, 0);
37 
38  return reg | ((u64)val << lower);
39 }
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◆ vgic_data_host_to_mmio_bus()

void vgic_data_host_to_mmio_bus ( void *  buf,
unsigned int  len,
unsigned long  data 
)

Definition at line 893 of file vgic-mmio.c.

895 {
896  switch (len) {
897  case 1:
898  break;
899  case 2:
900  data = cpu_to_le16(data);
901  break;
902  case 4:
903  data = cpu_to_le32(data);
904  break;
905  default:
906  data = cpu_to_le64(data);
907  }
908 
909  kvm_mmio_write_buf(buf, len, data);
910 }
void kvm_mmio_write_buf(void *buf, unsigned int len, unsigned long data)
Definition: mmio.c:13
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◆ vgic_data_mmio_bus_to_host()

unsigned long vgic_data_mmio_bus_to_host ( const void *  val,
unsigned int  len 
)

Definition at line 868 of file vgic-mmio.c.

869 {
870  unsigned long data = kvm_mmio_read_buf(val, len);
871 
872  switch (len) {
873  case 1:
874  return data;
875  case 2:
876  return le16_to_cpu(data);
877  case 4:
878  return le32_to_cpu(data);
879  default:
880  return le64_to_cpu(data);
881  }
882 }
unsigned long kvm_mmio_read_buf(const void *buf, unsigned int len)
Definition: mmio.c:45
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◆ vgic_find_mmio_region()

const struct vgic_register_region* vgic_find_mmio_region ( const struct vgic_register_region regions,
int  nr_regions,
unsigned int  offset 
)

Definition at line 836 of file vgic-mmio.c.

838 {
839  return bsearch((void *)(uintptr_t)offset, regions, nr_regions,
840  sizeof(regions[0]), match_region);
841 }
static int match_region(const void *key, const void *elt)
Definition: vgic-mmio.c:821
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◆ vgic_mmio_read_active()

unsigned long vgic_mmio_read_active ( struct kvm_vcpu *  vcpu,
gpa_t  addr,
unsigned int  len 
)

Definition at line 512 of file vgic-mmio.c.

514 {
515  u32 intid = VGIC_ADDR_TO_INTID(addr, 1);
516  u32 val;
517 
518  mutex_lock(&vcpu->kvm->arch.config_lock);
519  vgic_access_active_prepare(vcpu, intid);
520 
521  val = __vgic_mmio_read_active(vcpu, addr, len);
522 
523  vgic_access_active_finish(vcpu, intid);
524  mutex_unlock(&vcpu->kvm->arch.config_lock);
525 
526  return val;
527 }
static unsigned long __vgic_mmio_read_active(struct kvm_vcpu *vcpu, gpa_t addr, unsigned int len)
Definition: vgic-mmio.c:488
static void vgic_access_active_prepare(struct kvm_vcpu *vcpu, u32 intid)
Definition: vgic-mmio.c:471
static void vgic_access_active_finish(struct kvm_vcpu *vcpu, u32 intid)
Definition: vgic-mmio.c:480
#define VGIC_ADDR_TO_INTID(addr, bits)
Definition: vgic-mmio.h:58
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◆ vgic_mmio_read_config()

unsigned long vgic_mmio_read_config ( struct kvm_vcpu *  vcpu,
gpa_t  addr,
unsigned int  len 
)

Definition at line 714 of file vgic-mmio.c.

716 {
717  u32 intid = VGIC_ADDR_TO_INTID(addr, 2);
718  u32 value = 0;
719  int i;
720 
721  for (i = 0; i < len * 4; i++) {
722  struct vgic_irq *irq = vgic_get_irq(vcpu->kvm, vcpu, intid + i);
723 
724  if (irq->config == VGIC_CONFIG_EDGE)
725  value |= (2U << (i * 2));
726 
727  vgic_put_irq(vcpu->kvm, irq);
728  }
729 
730  return value;
731 }
@ VGIC_CONFIG_EDGE
Definition: arm_vgic.h:93
u32 intid
Definition: arm_vgic.h:133
struct kvm_vcpu * vcpu
Definition: arm_vgic.h:122
enum vgic_irq_config config
Definition: arm_vgic.h:152
struct vgic_irq * vgic_get_irq(struct kvm *kvm, struct kvm_vcpu *vcpu, u32 intid)
Definition: vgic.c:92
void vgic_put_irq(struct kvm *kvm, struct vgic_irq *irq)
Definition: vgic.c:139
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◆ vgic_mmio_read_enable()

unsigned long vgic_mmio_read_enable ( struct kvm_vcpu *  vcpu,
gpa_t  addr,
unsigned int  len 
)

Definition at line 96 of file vgic-mmio.c.

98 {
99  u32 intid = VGIC_ADDR_TO_INTID(addr, 1);
100  u32 value = 0;
101  int i;
102 
103  /* Loop over all IRQs affected by this read */
104  for (i = 0; i < len * 8; i++) {
105  struct vgic_irq *irq = vgic_get_irq(vcpu->kvm, vcpu, intid + i);
106 
107  if (irq->enabled)
108  value |= (1U << i);
109 
110  vgic_put_irq(vcpu->kvm, irq);
111  }
112 
113  return value;
114 }
bool enabled
Definition: arm_vgic.h:139
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◆ vgic_mmio_read_group()

unsigned long vgic_mmio_read_group ( struct kvm_vcpu *  vcpu,
gpa_t  addr,
unsigned int  len 
)

Definition at line 44 of file vgic-mmio.c.

46 {
47  u32 intid = VGIC_ADDR_TO_INTID(addr, 1);
48  u32 value = 0;
49  int i;
50 
51  /* Loop over all IRQs affected by this read */
52  for (i = 0; i < len * 8; i++) {
53  struct vgic_irq *irq = vgic_get_irq(vcpu->kvm, vcpu, intid + i);
54 
55  if (irq->group)
56  value |= BIT(i);
57 
58  vgic_put_irq(vcpu->kvm, irq);
59  }
60 
61  return value;
62 }
u8 group
Definition: arm_vgic.h:151
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◆ vgic_mmio_read_pending()

unsigned long vgic_mmio_read_pending ( struct kvm_vcpu *  vcpu,
gpa_t  addr,
unsigned int  len 
)

Definition at line 286 of file vgic-mmio.c.

288 {
289  return __read_pending(vcpu, addr, len, false);
290 }
static unsigned long __read_pending(struct kvm_vcpu *vcpu, gpa_t addr, unsigned int len, bool is_user)
Definition: vgic-mmio.c:229
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◆ vgic_mmio_read_priority()

unsigned long vgic_mmio_read_priority ( struct kvm_vcpu *  vcpu,
gpa_t  addr,
unsigned int  len 
)

Definition at line 667 of file vgic-mmio.c.

669 {
670  u32 intid = VGIC_ADDR_TO_INTID(addr, 8);
671  int i;
672  u64 val = 0;
673 
674  for (i = 0; i < len; i++) {
675  struct vgic_irq *irq = vgic_get_irq(vcpu->kvm, vcpu, intid + i);
676 
677  val |= (u64)irq->priority << (i * 8);
678 
679  vgic_put_irq(vcpu->kvm, irq);
680  }
681 
682  return val;
683 }
u8 priority
Definition: arm_vgic.h:150
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◆ vgic_mmio_read_rao()

unsigned long vgic_mmio_read_rao ( struct kvm_vcpu *  vcpu,
gpa_t  addr,
unsigned int  len 
)

Definition at line 25 of file vgic-mmio.c.

27 {
28  return -1UL;
29 }

◆ vgic_mmio_read_raz()

unsigned long vgic_mmio_read_raz ( struct kvm_vcpu *  vcpu,
gpa_t  addr,
unsigned int  len 
)

Definition at line 19 of file vgic-mmio.c.

21 {
22  return 0;
23 }

◆ vgic_mmio_uaccess_write_cactive()

int vgic_mmio_uaccess_write_cactive ( struct kvm_vcpu *  vcpu,
gpa_t  addr,
unsigned int  len,
unsigned long  val 
)

Definition at line 622 of file vgic-mmio.c.

625 {
626  __vgic_mmio_write_cactive(vcpu, addr, len, val);
627  return 0;
628 }
static void __vgic_mmio_write_cactive(struct kvm_vcpu *vcpu, gpa_t addr, unsigned int len, unsigned long val)
Definition: vgic-mmio.c:593
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◆ vgic_mmio_uaccess_write_sactive()

int vgic_mmio_uaccess_write_sactive ( struct kvm_vcpu *  vcpu,
gpa_t  addr,
unsigned int  len,
unsigned long  val 
)

Definition at line 659 of file vgic-mmio.c.

662 {
663  __vgic_mmio_write_sactive(vcpu, addr, len, val);
664  return 0;
665 }
static void __vgic_mmio_write_sactive(struct kvm_vcpu *vcpu, gpa_t addr, unsigned int len, unsigned long val)
Definition: vgic-mmio.c:630
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◆ vgic_mmio_uaccess_write_wi()

int vgic_mmio_uaccess_write_wi ( struct kvm_vcpu *  vcpu,
gpa_t  addr,
unsigned int  len,
unsigned long  val 
)

Definition at line 37 of file vgic-mmio.c.

39 {
40  /* Ignore */
41  return 0;
42 }

◆ vgic_mmio_write_cactive()

void vgic_mmio_write_cactive ( struct kvm_vcpu *  vcpu,
gpa_t  addr,
unsigned int  len,
unsigned long  val 
)

Definition at line 607 of file vgic-mmio.c.

610 {
611  u32 intid = VGIC_ADDR_TO_INTID(addr, 1);
612 
613  mutex_lock(&vcpu->kvm->arch.config_lock);
614  vgic_access_active_prepare(vcpu, intid);
615 
616  __vgic_mmio_write_cactive(vcpu, addr, len, val);
617 
618  vgic_access_active_finish(vcpu, intid);
619  mutex_unlock(&vcpu->kvm->arch.config_lock);
620 }
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◆ vgic_mmio_write_cenable()

void vgic_mmio_write_cenable ( struct kvm_vcpu *  vcpu,
gpa_t  addr,
unsigned int  len,
unsigned long  val 
)

Definition at line 165 of file vgic-mmio.c.

168 {
169  u32 intid = VGIC_ADDR_TO_INTID(addr, 1);
170  int i;
171  unsigned long flags;
172 
173  for_each_set_bit(i, &val, len * 8) {
174  struct vgic_irq *irq = vgic_get_irq(vcpu->kvm, vcpu, intid + i);
175 
176  raw_spin_lock_irqsave(&irq->irq_lock, flags);
177  if (irq->hw && vgic_irq_is_sgi(irq->intid) && irq->enabled)
178  disable_irq_nosync(irq->host_irq);
179 
180  irq->enabled = false;
181 
182  raw_spin_unlock_irqrestore(&irq->irq_lock, flags);
183  vgic_put_irq(vcpu->kvm, irq);
184  }
185 }
unsigned int host_irq
Definition: arm_vgic.h:143
bool hw
Definition: arm_vgic.h:140
raw_spinlock_t irq_lock
Definition: arm_vgic.h:118
#define vgic_irq_is_sgi(intid)
Definition: vgic.h:21
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◆ vgic_mmio_write_config()

void vgic_mmio_write_config ( struct kvm_vcpu *  vcpu,
gpa_t  addr,
unsigned int  len,
unsigned long  val 
)

Definition at line 733 of file vgic-mmio.c.

736 {
737  u32 intid = VGIC_ADDR_TO_INTID(addr, 2);
738  int i;
739  unsigned long flags;
740 
741  for (i = 0; i < len * 4; i++) {
742  struct vgic_irq *irq;
743 
744  /*
745  * The configuration cannot be changed for SGIs in general,
746  * for PPIs this is IMPLEMENTATION DEFINED. The arch timer
747  * code relies on PPIs being level triggered, so we also
748  * make them read-only here.
749  */
750  if (intid + i < VGIC_NR_PRIVATE_IRQS)
751  continue;
752 
753  irq = vgic_get_irq(vcpu->kvm, vcpu, intid + i);
754  raw_spin_lock_irqsave(&irq->irq_lock, flags);
755 
756  if (test_bit(i * 2 + 1, &val))
757  irq->config = VGIC_CONFIG_EDGE;
758  else
759  irq->config = VGIC_CONFIG_LEVEL;
760 
761  raw_spin_unlock_irqrestore(&irq->irq_lock, flags);
762  vgic_put_irq(vcpu->kvm, irq);
763  }
764 }
@ VGIC_CONFIG_LEVEL
Definition: arm_vgic.h:94
#define VGIC_NR_PRIVATE_IRQS
Definition: arm_vgic.h:27
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◆ vgic_mmio_write_cpending()

void vgic_mmio_write_cpending ( struct kvm_vcpu *  vcpu,
gpa_t  addr,
unsigned int  len,
unsigned long  val 
)

Definition at line 440 of file vgic-mmio.c.

443 {
444  __clear_pending(vcpu, addr, len, val, false);
445 }
static void __clear_pending(struct kvm_vcpu *vcpu, gpa_t addr, unsigned int len, unsigned long val, bool is_user)
Definition: vgic-mmio.c:389
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◆ vgic_mmio_write_group()

void vgic_mmio_write_group ( struct kvm_vcpu *  vcpu,
gpa_t  addr,
unsigned int  len,
unsigned long  val 
)

Definition at line 69 of file vgic-mmio.c.

71 {
72  u32 intid = VGIC_ADDR_TO_INTID(addr, 1);
73  int i;
74  unsigned long flags;
75 
76  for (i = 0; i < len * 8; i++) {
77  struct vgic_irq *irq = vgic_get_irq(vcpu->kvm, vcpu, intid + i);
78 
79  raw_spin_lock_irqsave(&irq->irq_lock, flags);
80  irq->group = !!(val & BIT(i));
81  if (irq->hw && vgic_irq_is_sgi(irq->intid)) {
82  vgic_update_vsgi(irq);
83  raw_spin_unlock_irqrestore(&irq->irq_lock, flags);
84  } else {
85  vgic_queue_irq_unlock(vcpu->kvm, irq, flags);
86  }
87 
88  vgic_put_irq(vcpu->kvm, irq);
89  }
90 }
static void vgic_update_vsgi(struct vgic_irq *irq)
Definition: vgic-mmio.c:64
bool vgic_queue_irq_unlock(struct kvm *kvm, struct vgic_irq *irq, unsigned long flags)
Definition: vgic.c:336
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◆ vgic_mmio_write_priority()

void vgic_mmio_write_priority ( struct kvm_vcpu *  vcpu,
gpa_t  addr,
unsigned int  len,
unsigned long  val 
)

Definition at line 692 of file vgic-mmio.c.

695 {
696  u32 intid = VGIC_ADDR_TO_INTID(addr, 8);
697  int i;
698  unsigned long flags;
699 
700  for (i = 0; i < len; i++) {
701  struct vgic_irq *irq = vgic_get_irq(vcpu->kvm, vcpu, intid + i);
702 
703  raw_spin_lock_irqsave(&irq->irq_lock, flags);
704  /* Narrow the priority range to what we actually support */
705  irq->priority = (val >> (i * 8)) & GENMASK(7, 8 - VGIC_PRI_BITS);
706  if (irq->hw && vgic_irq_is_sgi(irq->intid))
707  vgic_update_vsgi(irq);
708  raw_spin_unlock_irqrestore(&irq->irq_lock, flags);
709 
710  vgic_put_irq(vcpu->kvm, irq);
711  }
712 }
#define VGIC_PRI_BITS
Definition: vgic.h:19
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◆ vgic_mmio_write_sactive()

void vgic_mmio_write_sactive ( struct kvm_vcpu *  vcpu,
gpa_t  addr,
unsigned int  len,
unsigned long  val 
)

Definition at line 644 of file vgic-mmio.c.

647 {
648  u32 intid = VGIC_ADDR_TO_INTID(addr, 1);
649 
650  mutex_lock(&vcpu->kvm->arch.config_lock);
651  vgic_access_active_prepare(vcpu, intid);
652 
653  __vgic_mmio_write_sactive(vcpu, addr, len, val);
654 
655  vgic_access_active_finish(vcpu, intid);
656  mutex_unlock(&vcpu->kvm->arch.config_lock);
657 }
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◆ vgic_mmio_write_senable()

void vgic_mmio_write_senable ( struct kvm_vcpu *  vcpu,
gpa_t  addr,
unsigned int  len,
unsigned long  val 
)

Definition at line 116 of file vgic-mmio.c.

119 {
120  u32 intid = VGIC_ADDR_TO_INTID(addr, 1);
121  int i;
122  unsigned long flags;
123 
124  for_each_set_bit(i, &val, len * 8) {
125  struct vgic_irq *irq = vgic_get_irq(vcpu->kvm, vcpu, intid + i);
126 
127  raw_spin_lock_irqsave(&irq->irq_lock, flags);
128  if (irq->hw && vgic_irq_is_sgi(irq->intid)) {
129  if (!irq->enabled) {
130  struct irq_data *data;
131 
132  irq->enabled = true;
133  data = &irq_to_desc(irq->host_irq)->irq_data;
134  while (irqd_irq_disabled(data))
135  enable_irq(irq->host_irq);
136  }
137 
138  raw_spin_unlock_irqrestore(&irq->irq_lock, flags);
139  vgic_put_irq(vcpu->kvm, irq);
140 
141  continue;
142  } else if (vgic_irq_is_mapped_level(irq)) {
143  bool was_high = irq->line_level;
144 
145  /*
146  * We need to update the state of the interrupt because
147  * the guest might have changed the state of the device
148  * while the interrupt was disabled at the VGIC level.
149  */
151  /*
152  * Deactivate the physical interrupt so the GIC will let
153  * us know when it is asserted again.
154  */
155  if (!irq->active && was_high && !irq->line_level)
156  vgic_irq_set_phys_active(irq, false);
157  }
158  irq->enabled = true;
159  vgic_queue_irq_unlock(vcpu->kvm, irq, flags);
160 
161  vgic_put_irq(vcpu->kvm, irq);
162  }
163 }
bool line_level
Definition: arm_vgic.h:134
bool active
Definition: arm_vgic.h:138
bool vgic_get_phys_line_level(struct vgic_irq *irq)
Definition: vgic.c:180
void vgic_irq_set_phys_active(struct vgic_irq *irq, bool active)
Definition: vgic.c:196
static bool vgic_irq_is_mapped_level(struct vgic_irq *irq)
Definition: vgic.h:116
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◆ vgic_mmio_write_spending()

void vgic_mmio_write_spending ( struct kvm_vcpu *  vcpu,
gpa_t  addr,
unsigned int  len,
unsigned long  val 
)

Definition at line 353 of file vgic-mmio.c.

356 {
357  __set_pending(vcpu, addr, len, val, false);
358 }
static void __set_pending(struct kvm_vcpu *vcpu, gpa_t addr, unsigned int len, unsigned long val, bool is_user)
Definition: vgic-mmio.c:304
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◆ vgic_mmio_write_wi()

void vgic_mmio_write_wi ( struct kvm_vcpu *  vcpu,
gpa_t  addr,
unsigned int  len,
unsigned long  val 
)

Definition at line 31 of file vgic-mmio.c.

33 {
34  /* Ignore */
35 }

◆ vgic_read_irq_line_level_info()

u32 vgic_read_irq_line_level_info ( struct kvm_vcpu *  vcpu,
u32  intid 
)

Definition at line 766 of file vgic-mmio.c.

767 {
768  int i;
769  u32 val = 0;
770  int nr_irqs = vcpu->kvm->arch.vgic.nr_spis + VGIC_NR_PRIVATE_IRQS;
771 
772  for (i = 0; i < 32; i++) {
773  struct vgic_irq *irq;
774 
775  if ((intid + i) < VGIC_NR_SGIS || (intid + i) >= nr_irqs)
776  continue;
777 
778  irq = vgic_get_irq(vcpu->kvm, vcpu, intid + i);
779  if (irq->config == VGIC_CONFIG_LEVEL && irq->line_level)
780  val |= (1U << i);
781 
782  vgic_put_irq(vcpu->kvm, irq);
783  }
784 
785  return val;
786 }
#define VGIC_NR_SGIS
Definition: arm_vgic.h:25
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◆ vgic_sanitise_field()

u64 vgic_sanitise_field ( u64  reg,
u64  field_mask,
int  field_shift,
u64(*)(u64)  sanitise_fn 
)

Definition at line 404 of file vgic-mmio-v3.c.

406 {
407  u64 field = (reg & field_mask) >> field_shift;
408 
409  field = sanitise_fn(field) << field_shift;
410  return (reg & ~field_mask) | field;
411 }
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◆ vgic_sanitise_inner_cacheability()

u64 vgic_sanitise_inner_cacheability ( u64  reg)

Definition at line 381 of file vgic-mmio-v3.c.

382 {
383  switch (field) {
384  case GIC_BASER_CACHE_nCnB:
385  case GIC_BASER_CACHE_nC:
386  return GIC_BASER_CACHE_RaWb;
387  default:
388  return field;
389  }
390 }
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◆ vgic_sanitise_outer_cacheability()

u64 vgic_sanitise_outer_cacheability ( u64  reg)

Definition at line 393 of file vgic-mmio-v3.c.

394 {
395  switch (field) {
396  case GIC_BASER_CACHE_SameAsInner:
397  case GIC_BASER_CACHE_nC:
398  return field;
399  default:
400  return GIC_BASER_CACHE_SameAsInner;
401  }
402 }
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◆ vgic_sanitise_shareability()

u64 vgic_sanitise_shareability ( u64  reg)

Definition at line 370 of file vgic-mmio-v3.c.

371 {
372  switch (field) {
373  case GIC_BASER_OuterShareable:
374  return GIC_BASER_InnerShareable;
375  default:
376  return field;
377  }
378 }
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◆ vgic_uaccess()

int vgic_uaccess ( struct kvm_vcpu *  vcpu,
struct vgic_io_device dev,
bool  is_write,
int  offset,
u32 *  val 
)

Definition at line 1005 of file vgic-mmio.c.

1007 {
1008  if (is_write)
1009  return vgic_uaccess_write(vcpu, dev, offset, val);
1010  else
1011  return vgic_uaccess_read(vcpu, dev, offset, val);
1012 }
static int vgic_uaccess_write(struct kvm_vcpu *vcpu, struct vgic_io_device *iodev, gpa_t addr, const u32 *val)
Definition: vgic-mmio.c:984
static int vgic_uaccess_read(struct kvm_vcpu *vcpu, struct vgic_io_device *iodev, gpa_t addr, u32 *val)
Definition: vgic-mmio.c:963
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◆ vgic_uaccess_read_active()

unsigned long vgic_uaccess_read_active ( struct kvm_vcpu *  vcpu,
gpa_t  addr,
unsigned int  len 
)

Definition at line 529 of file vgic-mmio.c.

531 {
532  return __vgic_mmio_read_active(vcpu, addr, len);
533 }
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◆ vgic_uaccess_read_pending()

unsigned long vgic_uaccess_read_pending ( struct kvm_vcpu *  vcpu,
gpa_t  addr,
unsigned int  len 
)

Definition at line 292 of file vgic-mmio.c.

294 {
295  return __read_pending(vcpu, addr, len, true);
296 }
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◆ vgic_uaccess_write_cenable()

int vgic_uaccess_write_cenable ( struct kvm_vcpu *  vcpu,
gpa_t  addr,
unsigned int  len,
unsigned long  val 
)

Definition at line 208 of file vgic-mmio.c.

211 {
212  u32 intid = VGIC_ADDR_TO_INTID(addr, 1);
213  int i;
214  unsigned long flags;
215 
216  for_each_set_bit(i, &val, len * 8) {
217  struct vgic_irq *irq = vgic_get_irq(vcpu->kvm, vcpu, intid + i);
218 
219  raw_spin_lock_irqsave(&irq->irq_lock, flags);
220  irq->enabled = false;
221  raw_spin_unlock_irqrestore(&irq->irq_lock, flags);
222 
223  vgic_put_irq(vcpu->kvm, irq);
224  }
225 
226  return 0;
227 }
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◆ vgic_uaccess_write_cpending()

int vgic_uaccess_write_cpending ( struct kvm_vcpu *  vcpu,
gpa_t  addr,
unsigned int  len,
unsigned long  val 
)

Definition at line 447 of file vgic-mmio.c.

450 {
451  __clear_pending(vcpu, addr, len, val, true);
452  return 0;
453 }
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◆ vgic_uaccess_write_senable()

int vgic_uaccess_write_senable ( struct kvm_vcpu *  vcpu,
gpa_t  addr,
unsigned int  len,
unsigned long  val 
)

Definition at line 187 of file vgic-mmio.c.

190 {
191  u32 intid = VGIC_ADDR_TO_INTID(addr, 1);
192  int i;
193  unsigned long flags;
194 
195  for_each_set_bit(i, &val, len * 8) {
196  struct vgic_irq *irq = vgic_get_irq(vcpu->kvm, vcpu, intid + i);
197 
198  raw_spin_lock_irqsave(&irq->irq_lock, flags);
199  irq->enabled = true;
200  vgic_queue_irq_unlock(vcpu->kvm, irq, flags);
201 
202  vgic_put_irq(vcpu->kvm, irq);
203  }
204 
205  return 0;
206 }
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◆ vgic_uaccess_write_spending()

int vgic_uaccess_write_spending ( struct kvm_vcpu *  vcpu,
gpa_t  addr,
unsigned int  len,
unsigned long  val 
)

Definition at line 360 of file vgic-mmio.c.

363 {
364  __set_pending(vcpu, addr, len, val, true);
365  return 0;
366 }
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◆ vgic_v2_init_dist_iodev()

unsigned int vgic_v2_init_dist_iodev ( struct vgic_io_device dev)

Definition at line 487 of file vgic-mmio-v2.c.

488 {
490  dev->nr_regions = ARRAY_SIZE(vgic_v2_dist_registers);
491 
493 
494  return SZ_4K;
495 }
static void kvm_iodevice_init(struct kvm_io_device *dev, const struct kvm_io_device_ops *ops)
Definition: iodev.h:36
const struct vgic_register_region * regions
Definition: arm_vgic.h:181
struct kvm_io_device dev
Definition: arm_vgic.h:184
static const struct vgic_register_region vgic_v2_dist_registers[]
Definition: vgic-mmio-v2.c:413
const struct kvm_io_device_ops kvm_io_gic_ops
Definition: vgic-mmio.c:1075
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◆ vgic_v3_init_dist_iodev()

unsigned int vgic_v3_init_dist_iodev ( struct vgic_io_device dev)

Definition at line 727 of file vgic-mmio-v3.c.

728 {
730  dev->nr_regions = ARRAY_SIZE(vgic_v3_dist_registers);
731 
733 
734  return SZ_64K;
735 }
static const struct vgic_register_region vgic_v3_dist_registers[]
Definition: vgic-mmio-v3.c:594
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◆ vgic_write_irq_line_level_info()

void vgic_write_irq_line_level_info ( struct kvm_vcpu *  vcpu,
u32  intid,
const u32  val 
)

Definition at line 788 of file vgic-mmio.c.

790 {
791  int i;
792  int nr_irqs = vcpu->kvm->arch.vgic.nr_spis + VGIC_NR_PRIVATE_IRQS;
793  unsigned long flags;
794 
795  for (i = 0; i < 32; i++) {
796  struct vgic_irq *irq;
797  bool new_level;
798 
799  if ((intid + i) < VGIC_NR_SGIS || (intid + i) >= nr_irqs)
800  continue;
801 
802  irq = vgic_get_irq(vcpu->kvm, vcpu, intid + i);
803 
804  /*
805  * Line level is set irrespective of irq type
806  * (level or edge) to avoid dependency that VM should
807  * restore irq config before line level.
808  */
809  new_level = !!(val & (1U << i));
810  raw_spin_lock_irqsave(&irq->irq_lock, flags);
811  irq->line_level = new_level;
812  if (new_level)
813  vgic_queue_irq_unlock(vcpu->kvm, irq, flags);
814  else
815  raw_spin_unlock_irqrestore(&irq->irq_lock, flags);
816 
817  vgic_put_irq(vcpu->kvm, irq);
818  }
819 }
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Variable Documentation

◆ kvm_io_gic_ops

const struct kvm_io_device_ops kvm_io_gic_ops
extern

Definition at line 1046 of file vgic-mmio.c.