KVM
Functions | Variables
vgic-mmio.c File Reference
#include <linux/bitops.h>
#include <linux/bsearch.h>
#include <linux/interrupt.h>
#include <linux/irq.h>
#include <linux/kvm.h>
#include <linux/kvm_host.h>
#include <kvm/iodev.h>
#include <kvm/arm_arch_timer.h>
#include <kvm/arm_vgic.h>
#include "vgic.h"
#include "vgic-mmio.h"
Include dependency graph for vgic-mmio.c:

Go to the source code of this file.

Functions

unsigned long vgic_mmio_read_raz (struct kvm_vcpu *vcpu, gpa_t addr, unsigned int len)
 
unsigned long vgic_mmio_read_rao (struct kvm_vcpu *vcpu, gpa_t addr, unsigned int len)
 
void vgic_mmio_write_wi (struct kvm_vcpu *vcpu, gpa_t addr, unsigned int len, unsigned long val)
 
int vgic_mmio_uaccess_write_wi (struct kvm_vcpu *vcpu, gpa_t addr, unsigned int len, unsigned long val)
 
unsigned long vgic_mmio_read_group (struct kvm_vcpu *vcpu, gpa_t addr, unsigned int len)
 
static void vgic_update_vsgi (struct vgic_irq *irq)
 
void vgic_mmio_write_group (struct kvm_vcpu *vcpu, gpa_t addr, unsigned int len, unsigned long val)
 
unsigned long vgic_mmio_read_enable (struct kvm_vcpu *vcpu, gpa_t addr, unsigned int len)
 
void vgic_mmio_write_senable (struct kvm_vcpu *vcpu, gpa_t addr, unsigned int len, unsigned long val)
 
void vgic_mmio_write_cenable (struct kvm_vcpu *vcpu, gpa_t addr, unsigned int len, unsigned long val)
 
int vgic_uaccess_write_senable (struct kvm_vcpu *vcpu, gpa_t addr, unsigned int len, unsigned long val)
 
int vgic_uaccess_write_cenable (struct kvm_vcpu *vcpu, gpa_t addr, unsigned int len, unsigned long val)
 
static unsigned long __read_pending (struct kvm_vcpu *vcpu, gpa_t addr, unsigned int len, bool is_user)
 
unsigned long vgic_mmio_read_pending (struct kvm_vcpu *vcpu, gpa_t addr, unsigned int len)
 
unsigned long vgic_uaccess_read_pending (struct kvm_vcpu *vcpu, gpa_t addr, unsigned int len)
 
static bool is_vgic_v2_sgi (struct kvm_vcpu *vcpu, struct vgic_irq *irq)
 
static void __set_pending (struct kvm_vcpu *vcpu, gpa_t addr, unsigned int len, unsigned long val, bool is_user)
 
void vgic_mmio_write_spending (struct kvm_vcpu *vcpu, gpa_t addr, unsigned int len, unsigned long val)
 
int vgic_uaccess_write_spending (struct kvm_vcpu *vcpu, gpa_t addr, unsigned int len, unsigned long val)
 
static void vgic_hw_irq_cpending (struct kvm_vcpu *vcpu, struct vgic_irq *irq)
 
static void __clear_pending (struct kvm_vcpu *vcpu, gpa_t addr, unsigned int len, unsigned long val, bool is_user)
 
void vgic_mmio_write_cpending (struct kvm_vcpu *vcpu, gpa_t addr, unsigned int len, unsigned long val)
 
int vgic_uaccess_write_cpending (struct kvm_vcpu *vcpu, gpa_t addr, unsigned int len, unsigned long val)
 
static void vgic_access_active_prepare (struct kvm_vcpu *vcpu, u32 intid)
 
static void vgic_access_active_finish (struct kvm_vcpu *vcpu, u32 intid)
 
static unsigned long __vgic_mmio_read_active (struct kvm_vcpu *vcpu, gpa_t addr, unsigned int len)
 
unsigned long vgic_mmio_read_active (struct kvm_vcpu *vcpu, gpa_t addr, unsigned int len)
 
unsigned long vgic_uaccess_read_active (struct kvm_vcpu *vcpu, gpa_t addr, unsigned int len)
 
static void vgic_hw_irq_change_active (struct kvm_vcpu *vcpu, struct vgic_irq *irq, bool active, bool is_uaccess)
 
static void vgic_mmio_change_active (struct kvm_vcpu *vcpu, struct vgic_irq *irq, bool active)
 
static void __vgic_mmio_write_cactive (struct kvm_vcpu *vcpu, gpa_t addr, unsigned int len, unsigned long val)
 
void vgic_mmio_write_cactive (struct kvm_vcpu *vcpu, gpa_t addr, unsigned int len, unsigned long val)
 
int vgic_mmio_uaccess_write_cactive (struct kvm_vcpu *vcpu, gpa_t addr, unsigned int len, unsigned long val)
 
static void __vgic_mmio_write_sactive (struct kvm_vcpu *vcpu, gpa_t addr, unsigned int len, unsigned long val)
 
void vgic_mmio_write_sactive (struct kvm_vcpu *vcpu, gpa_t addr, unsigned int len, unsigned long val)
 
int vgic_mmio_uaccess_write_sactive (struct kvm_vcpu *vcpu, gpa_t addr, unsigned int len, unsigned long val)
 
unsigned long vgic_mmio_read_priority (struct kvm_vcpu *vcpu, gpa_t addr, unsigned int len)
 
void vgic_mmio_write_priority (struct kvm_vcpu *vcpu, gpa_t addr, unsigned int len, unsigned long val)
 
unsigned long vgic_mmio_read_config (struct kvm_vcpu *vcpu, gpa_t addr, unsigned int len)
 
void vgic_mmio_write_config (struct kvm_vcpu *vcpu, gpa_t addr, unsigned int len, unsigned long val)
 
u32 vgic_read_irq_line_level_info (struct kvm_vcpu *vcpu, u32 intid)
 
void vgic_write_irq_line_level_info (struct kvm_vcpu *vcpu, u32 intid, const u32 val)
 
static int match_region (const void *key, const void *elt)
 
const struct vgic_register_regionvgic_find_mmio_region (const struct vgic_register_region *regions, int nr_regions, unsigned int offset)
 
void vgic_set_vmcr (struct kvm_vcpu *vcpu, struct vgic_vmcr *vmcr)
 
void vgic_get_vmcr (struct kvm_vcpu *vcpu, struct vgic_vmcr *vmcr)
 
unsigned long vgic_data_mmio_bus_to_host (const void *val, unsigned int len)
 
void vgic_data_host_to_mmio_bus (void *buf, unsigned int len, unsigned long data)
 
static struct vgic_io_devicekvm_to_vgic_iodev (const struct kvm_io_device *dev)
 
static bool check_region (const struct kvm *kvm, const struct vgic_register_region *region, gpa_t addr, int len)
 
const struct vgic_register_regionvgic_get_mmio_region (struct kvm_vcpu *vcpu, struct vgic_io_device *iodev, gpa_t addr, int len)
 
static int vgic_uaccess_read (struct kvm_vcpu *vcpu, struct vgic_io_device *iodev, gpa_t addr, u32 *val)
 
static int vgic_uaccess_write (struct kvm_vcpu *vcpu, struct vgic_io_device *iodev, gpa_t addr, const u32 *val)
 
int vgic_uaccess (struct kvm_vcpu *vcpu, struct vgic_io_device *dev, bool is_write, int offset, u32 *val)
 
static int dispatch_mmio_read (struct kvm_vcpu *vcpu, struct kvm_io_device *dev, gpa_t addr, int len, void *val)
 
static int dispatch_mmio_write (struct kvm_vcpu *vcpu, struct kvm_io_device *dev, gpa_t addr, int len, const void *val)
 
int vgic_register_dist_iodev (struct kvm *kvm, gpa_t dist_base_address, enum vgic_type type)
 

Variables

const struct kvm_io_device_ops kvm_io_gic_ops
 

Function Documentation

◆ __clear_pending()

static void __clear_pending ( struct kvm_vcpu *  vcpu,
gpa_t  addr,
unsigned int  len,
unsigned long  val,
bool  is_user 
)
static

Definition at line 389 of file vgic-mmio.c.

392 {
393  u32 intid = VGIC_ADDR_TO_INTID(addr, 1);
394  int i;
395  unsigned long flags;
396 
397  for_each_set_bit(i, &val, len * 8) {
398  struct vgic_irq *irq = vgic_get_irq(vcpu->kvm, vcpu, intid + i);
399 
400  /* GICD_ICPENDR0 SGI bits are WI when written from the guest. */
401  if (is_vgic_v2_sgi(vcpu, irq) && !is_user) {
402  vgic_put_irq(vcpu->kvm, irq);
403  continue;
404  }
405 
406  raw_spin_lock_irqsave(&irq->irq_lock, flags);
407 
408  /*
409  * More fun with GICv2 SGIs! If we're clearing one of them
410  * from userspace, which source vcpu to clear? Let's not
411  * even think of it, and blow the whole set.
412  */
413  if (is_vgic_v2_sgi(vcpu, irq))
414  irq->source = 0;
415 
416  if (irq->hw && vgic_irq_is_sgi(irq->intid)) {
417  /* HW SGI? Ask the GIC to clear its pending bit */
418  int err;
419  err = irq_set_irqchip_state(irq->host_irq,
420  IRQCHIP_STATE_PENDING,
421  false);
422  WARN_RATELIMIT(err, "IRQ %d", irq->host_irq);
423 
424  raw_spin_unlock_irqrestore(&irq->irq_lock, flags);
425  vgic_put_irq(vcpu->kvm, irq);
426 
427  continue;
428  }
429 
430  if (irq->hw && !is_user)
432  else
433  irq->pending_latch = false;
434 
435  raw_spin_unlock_irqrestore(&irq->irq_lock, flags);
436  vgic_put_irq(vcpu->kvm, irq);
437  }
438 }
u32 intid
Definition: arm_vgic.h:133
unsigned int host_irq
Definition: arm_vgic.h:143
struct kvm_vcpu * vcpu
Definition: arm_vgic.h:122
bool pending_latch
Definition: arm_vgic.h:135
bool hw
Definition: arm_vgic.h:140
raw_spinlock_t irq_lock
Definition: arm_vgic.h:118
u8 source
Definition: arm_vgic.h:148
static bool is_vgic_v2_sgi(struct kvm_vcpu *vcpu, struct vgic_irq *irq)
Definition: vgic-mmio.c:298
static void vgic_hw_irq_cpending(struct kvm_vcpu *vcpu, struct vgic_irq *irq)
Definition: vgic-mmio.c:369
#define VGIC_ADDR_TO_INTID(addr, bits)
Definition: vgic-mmio.h:58
struct vgic_irq * vgic_get_irq(struct kvm *kvm, struct kvm_vcpu *vcpu, u32 intid)
Definition: vgic.c:92
void vgic_put_irq(struct kvm *kvm, struct vgic_irq *irq)
Definition: vgic.c:139
#define vgic_irq_is_sgi(intid)
Definition: vgic.h:21
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◆ __read_pending()

static unsigned long __read_pending ( struct kvm_vcpu *  vcpu,
gpa_t  addr,
unsigned int  len,
bool  is_user 
)
static

Definition at line 229 of file vgic-mmio.c.

232 {
233  u32 intid = VGIC_ADDR_TO_INTID(addr, 1);
234  u32 value = 0;
235  int i;
236 
237  /* Loop over all IRQs affected by this read */
238  for (i = 0; i < len * 8; i++) {
239  struct vgic_irq *irq = vgic_get_irq(vcpu->kvm, vcpu, intid + i);
240  unsigned long flags;
241  bool val;
242 
243  /*
244  * When used from userspace with a GICv3 model:
245  *
246  * Pending state of interrupt is latched in pending_latch
247  * variable. Userspace will save and restore pending state
248  * and line_level separately.
249  * Refer to Documentation/virt/kvm/devices/arm-vgic-v3.rst
250  * for handling of ISPENDR and ICPENDR.
251  */
252  raw_spin_lock_irqsave(&irq->irq_lock, flags);
253  if (irq->hw && vgic_irq_is_sgi(irq->intid)) {
254  int err;
255 
256  val = false;
257  err = irq_get_irqchip_state(irq->host_irq,
258  IRQCHIP_STATE_PENDING,
259  &val);
260  WARN_RATELIMIT(err, "IRQ %d", irq->host_irq);
261  } else if (!is_user && vgic_irq_is_mapped_level(irq)) {
262  val = vgic_get_phys_line_level(irq);
263  } else {
264  switch (vcpu->kvm->arch.vgic.vgic_model) {
265  case KVM_DEV_TYPE_ARM_VGIC_V3:
266  if (is_user) {
267  val = irq->pending_latch;
268  break;
269  }
270  fallthrough;
271  default:
272  val = irq_is_pending(irq);
273  break;
274  }
275  }
276 
277  value |= ((u32)val << i);
278  raw_spin_unlock_irqrestore(&irq->irq_lock, flags);
279 
280  vgic_put_irq(vcpu->kvm, irq);
281  }
282 
283  return value;
284 }
bool vgic_get_phys_line_level(struct vgic_irq *irq)
Definition: vgic.c:180
static bool irq_is_pending(struct vgic_irq *irq)
Definition: vgic.h:108
static bool vgic_irq_is_mapped_level(struct vgic_irq *irq)
Definition: vgic.h:116
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◆ __set_pending()

static void __set_pending ( struct kvm_vcpu *  vcpu,
gpa_t  addr,
unsigned int  len,
unsigned long  val,
bool  is_user 
)
static

Definition at line 304 of file vgic-mmio.c.

306 {
307  u32 intid = VGIC_ADDR_TO_INTID(addr, 1);
308  int i;
309  unsigned long flags;
310 
311  for_each_set_bit(i, &val, len * 8) {
312  struct vgic_irq *irq = vgic_get_irq(vcpu->kvm, vcpu, intid + i);
313 
314  /* GICD_ISPENDR0 SGI bits are WI when written from the guest. */
315  if (is_vgic_v2_sgi(vcpu, irq) && !is_user) {
316  vgic_put_irq(vcpu->kvm, irq);
317  continue;
318  }
319 
320  raw_spin_lock_irqsave(&irq->irq_lock, flags);
321 
322  /*
323  * GICv2 SGIs are terribly broken. We can't restore
324  * the source of the interrupt, so just pick the vcpu
325  * itself as the source...
326  */
327  if (is_vgic_v2_sgi(vcpu, irq))
328  irq->source |= BIT(vcpu->vcpu_id);
329 
330  if (irq->hw && vgic_irq_is_sgi(irq->intid)) {
331  /* HW SGI? Ask the GIC to inject it */
332  int err;
333  err = irq_set_irqchip_state(irq->host_irq,
334  IRQCHIP_STATE_PENDING,
335  true);
336  WARN_RATELIMIT(err, "IRQ %d", irq->host_irq);
337 
338  raw_spin_unlock_irqrestore(&irq->irq_lock, flags);
339  vgic_put_irq(vcpu->kvm, irq);
340 
341  continue;
342  }
343 
344  irq->pending_latch = true;
345  if (irq->hw && !is_user)
346  vgic_irq_set_phys_active(irq, true);
347 
348  vgic_queue_irq_unlock(vcpu->kvm, irq, flags);
349  vgic_put_irq(vcpu->kvm, irq);
350  }
351 }
bool vgic_queue_irq_unlock(struct kvm *kvm, struct vgic_irq *irq, unsigned long flags)
Definition: vgic.c:336
void vgic_irq_set_phys_active(struct vgic_irq *irq, bool active)
Definition: vgic.c:196
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◆ __vgic_mmio_read_active()

static unsigned long __vgic_mmio_read_active ( struct kvm_vcpu *  vcpu,
gpa_t  addr,
unsigned int  len 
)
static

Definition at line 488 of file vgic-mmio.c.

490 {
491  u32 intid = VGIC_ADDR_TO_INTID(addr, 1);
492  u32 value = 0;
493  int i;
494 
495  /* Loop over all IRQs affected by this read */
496  for (i = 0; i < len * 8; i++) {
497  struct vgic_irq *irq = vgic_get_irq(vcpu->kvm, vcpu, intid + i);
498 
499  /*
500  * Even for HW interrupts, don't evaluate the HW state as
501  * all the guest is interested in is the virtual state.
502  */
503  if (irq->active)
504  value |= (1U << i);
505 
506  vgic_put_irq(vcpu->kvm, irq);
507  }
508 
509  return value;
510 }
bool active
Definition: arm_vgic.h:138
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◆ __vgic_mmio_write_cactive()

static void __vgic_mmio_write_cactive ( struct kvm_vcpu *  vcpu,
gpa_t  addr,
unsigned int  len,
unsigned long  val 
)
static

Definition at line 593 of file vgic-mmio.c.

596 {
597  u32 intid = VGIC_ADDR_TO_INTID(addr, 1);
598  int i;
599 
600  for_each_set_bit(i, &val, len * 8) {
601  struct vgic_irq *irq = vgic_get_irq(vcpu->kvm, vcpu, intid + i);
602  vgic_mmio_change_active(vcpu, irq, false);
603  vgic_put_irq(vcpu->kvm, irq);
604  }
605 }
static void vgic_mmio_change_active(struct kvm_vcpu *vcpu, struct vgic_irq *irq, bool active)
Definition: vgic-mmio.c:546
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◆ __vgic_mmio_write_sactive()

static void __vgic_mmio_write_sactive ( struct kvm_vcpu *  vcpu,
gpa_t  addr,
unsigned int  len,
unsigned long  val 
)
static

Definition at line 630 of file vgic-mmio.c.

633 {
634  u32 intid = VGIC_ADDR_TO_INTID(addr, 1);
635  int i;
636 
637  for_each_set_bit(i, &val, len * 8) {
638  struct vgic_irq *irq = vgic_get_irq(vcpu->kvm, vcpu, intid + i);
639  vgic_mmio_change_active(vcpu, irq, true);
640  vgic_put_irq(vcpu->kvm, irq);
641  }
642 }
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◆ check_region()

static bool check_region ( const struct kvm *  kvm,
const struct vgic_register_region region,
gpa_t  addr,
int  len 
)
static

Definition at line 918 of file vgic-mmio.c.

921 {
922  int flags, nr_irqs = kvm->arch.vgic.nr_spis + VGIC_NR_PRIVATE_IRQS;
923 
924  switch (len) {
925  case sizeof(u8):
926  flags = VGIC_ACCESS_8bit;
927  break;
928  case sizeof(u32):
929  flags = VGIC_ACCESS_32bit;
930  break;
931  case sizeof(u64):
932  flags = VGIC_ACCESS_64bit;
933  break;
934  default:
935  return false;
936  }
937 
938  if ((region->access_flags & flags) && IS_ALIGNED(addr, len)) {
939  if (!region->bits_per_irq)
940  return true;
941 
942  /* Do we access a non-allocated IRQ? */
943  return VGIC_ADDR_TO_INTID(addr, region->bits_per_irq) < nr_irqs;
944  }
945 
946  return false;
947 }
#define VGIC_NR_PRIVATE_IRQS
Definition: arm_vgic.h:27
unsigned int access_flags
Definition: vgic-mmio.h:12
unsigned int bits_per_irq
Definition: vgic-mmio.h:11
#define VGIC_ACCESS_8bit
Definition: vgic-mmio.h:39
#define VGIC_ACCESS_64bit
Definition: vgic-mmio.h:41
#define VGIC_ACCESS_32bit
Definition: vgic-mmio.h:40
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◆ dispatch_mmio_read()

static int dispatch_mmio_read ( struct kvm_vcpu *  vcpu,
struct kvm_io_device dev,
gpa_t  addr,
int  len,
void *  val 
)
static

Definition at line 1014 of file vgic-mmio.c.

1016 {
1017  struct vgic_io_device *iodev = kvm_to_vgic_iodev(dev);
1018  const struct vgic_register_region *region;
1019  unsigned long data = 0;
1020 
1021  region = vgic_get_mmio_region(vcpu, iodev, addr, len);
1022  if (!region) {
1023  memset(val, 0, len);
1024  return 0;
1025  }
1026 
1027  switch (iodev->iodev_type) {
1028  case IODEV_CPUIF:
1029  data = region->read(vcpu, addr, len);
1030  break;
1031  case IODEV_DIST:
1032  data = region->read(vcpu, addr, len);
1033  break;
1034  case IODEV_REDIST:
1035  data = region->read(iodev->redist_vcpu, addr, len);
1036  break;
1037  case IODEV_ITS:
1038  data = region->its_read(vcpu->kvm, iodev->its, addr, len);
1039  break;
1040  }
1041 
1042  vgic_data_host_to_mmio_bus(val, len, data);
1043  return 0;
1044 }
@ IODEV_REDIST
Definition: arm_vgic.h:171
@ IODEV_ITS
Definition: arm_vgic.h:172
@ IODEV_CPUIF
Definition: arm_vgic.h:169
@ IODEV_DIST
Definition: arm_vgic.h:170
struct kvm_vcpu * redist_vcpu
Definition: arm_vgic.h:178
struct vgic_its * its
Definition: arm_vgic.h:179
enum iodev_type iodev_type
Definition: arm_vgic.h:182
struct kvm_io_device dev
Definition: arm_vgic.h:184
unsigned int len
Definition: vgic-mmio.h:10
unsigned long(* read)(struct kvm_vcpu *vcpu, gpa_t addr, unsigned int len)
Definition: vgic-mmio.h:14
unsigned long(* its_read)(struct kvm *kvm, struct vgic_its *its, gpa_t addr, unsigned int len)
Definition: vgic-mmio.h:16
void vgic_data_host_to_mmio_bus(void *buf, unsigned int len, unsigned long data)
Definition: vgic-mmio.c:893
static struct vgic_io_device * kvm_to_vgic_iodev(const struct kvm_io_device *dev)
Definition: vgic-mmio.c:913
const struct vgic_register_region * vgic_get_mmio_region(struct kvm_vcpu *vcpu, struct vgic_io_device *iodev, gpa_t addr, int len)
Definition: vgic-mmio.c:950
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◆ dispatch_mmio_write()

static int dispatch_mmio_write ( struct kvm_vcpu *  vcpu,
struct kvm_io_device dev,
gpa_t  addr,
int  len,
const void *  val 
)
static

Definition at line 1046 of file vgic-mmio.c.

1048 {
1049  struct vgic_io_device *iodev = kvm_to_vgic_iodev(dev);
1050  const struct vgic_register_region *region;
1051  unsigned long data = vgic_data_mmio_bus_to_host(val, len);
1052 
1053  region = vgic_get_mmio_region(vcpu, iodev, addr, len);
1054  if (!region)
1055  return 0;
1056 
1057  switch (iodev->iodev_type) {
1058  case IODEV_CPUIF:
1059  region->write(vcpu, addr, len, data);
1060  break;
1061  case IODEV_DIST:
1062  region->write(vcpu, addr, len, data);
1063  break;
1064  case IODEV_REDIST:
1065  region->write(iodev->redist_vcpu, addr, len, data);
1066  break;
1067  case IODEV_ITS:
1068  region->its_write(vcpu->kvm, iodev->its, addr, len, data);
1069  break;
1070  }
1071 
1072  return 0;
1073 }
void(* write)(struct kvm_vcpu *vcpu, gpa_t addr, unsigned int len, unsigned long val)
Definition: vgic-mmio.h:20
void(* its_write)(struct kvm *kvm, struct vgic_its *its, gpa_t addr, unsigned int len, unsigned long val)
Definition: vgic-mmio.h:22
unsigned long vgic_data_mmio_bus_to_host(const void *val, unsigned int len)
Definition: vgic-mmio.c:868
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◆ is_vgic_v2_sgi()

static bool is_vgic_v2_sgi ( struct kvm_vcpu *  vcpu,
struct vgic_irq irq 
)
static

Definition at line 298 of file vgic-mmio.c.

299 {
300  return (vgic_irq_is_sgi(irq->intid) &&
301  vcpu->kvm->arch.vgic.vgic_model == KVM_DEV_TYPE_ARM_VGIC_V2);
302 }
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◆ kvm_to_vgic_iodev()

static struct vgic_io_device* kvm_to_vgic_iodev ( const struct kvm_io_device dev)
static

Definition at line 913 of file vgic-mmio.c.

914 {
915  return container_of(dev, struct vgic_io_device, dev);
916 }
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◆ match_region()

static int match_region ( const void *  key,
const void *  elt 
)
static

Definition at line 821 of file vgic-mmio.c.

822 {
823  const unsigned int offset = (unsigned long)key;
824  const struct vgic_register_region *region = elt;
825 
826  if (offset < region->reg_offset)
827  return -1;
828 
829  if (offset >= region->reg_offset + region->len)
830  return 1;
831 
832  return 0;
833 }
unsigned int reg_offset
Definition: vgic-mmio.h:9
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◆ vgic_access_active_finish()

static void vgic_access_active_finish ( struct kvm_vcpu *  vcpu,
u32  intid 
)
static

Definition at line 480 of file vgic-mmio.c.

481 {
482  if ((vcpu->kvm->arch.vgic.vgic_model == KVM_DEV_TYPE_ARM_VGIC_V3 &&
483  vcpu != kvm_get_running_vcpu()) ||
484  intid >= VGIC_NR_PRIVATE_IRQS)
485  kvm_arm_resume_guest(vcpu->kvm);
486 }
void kvm_arm_resume_guest(struct kvm *kvm)
Definition: arm.c:729
struct kvm_vcpu * kvm_get_running_vcpu(void)
Definition: kvm_main.c:6338
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◆ vgic_access_active_prepare()

static void vgic_access_active_prepare ( struct kvm_vcpu *  vcpu,
u32  intid 
)
static

Definition at line 471 of file vgic-mmio.c.

472 {
473  if ((vcpu->kvm->arch.vgic.vgic_model == KVM_DEV_TYPE_ARM_VGIC_V3 &&
474  vcpu != kvm_get_running_vcpu()) ||
475  intid >= VGIC_NR_PRIVATE_IRQS)
476  kvm_arm_halt_guest(vcpu->kvm);
477 }
void kvm_arm_halt_guest(struct kvm *kvm)
Definition: arm.c:719
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◆ vgic_data_host_to_mmio_bus()

void vgic_data_host_to_mmio_bus ( void *  buf,
unsigned int  len,
unsigned long  data 
)

Definition at line 893 of file vgic-mmio.c.

895 {
896  switch (len) {
897  case 1:
898  break;
899  case 2:
900  data = cpu_to_le16(data);
901  break;
902  case 4:
903  data = cpu_to_le32(data);
904  break;
905  default:
906  data = cpu_to_le64(data);
907  }
908 
909  kvm_mmio_write_buf(buf, len, data);
910 }
void kvm_mmio_write_buf(void *buf, unsigned int len, unsigned long data)
Definition: mmio.c:13
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◆ vgic_data_mmio_bus_to_host()

unsigned long vgic_data_mmio_bus_to_host ( const void *  val,
unsigned int  len 
)

Definition at line 868 of file vgic-mmio.c.

869 {
870  unsigned long data = kvm_mmio_read_buf(val, len);
871 
872  switch (len) {
873  case 1:
874  return data;
875  case 2:
876  return le16_to_cpu(data);
877  case 4:
878  return le32_to_cpu(data);
879  default:
880  return le64_to_cpu(data);
881  }
882 }
unsigned long kvm_mmio_read_buf(const void *buf, unsigned int len)
Definition: mmio.c:45
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◆ vgic_find_mmio_region()

const struct vgic_register_region* vgic_find_mmio_region ( const struct vgic_register_region regions,
int  nr_regions,
unsigned int  offset 
)

Definition at line 836 of file vgic-mmio.c.

838 {
839  return bsearch((void *)(uintptr_t)offset, regions, nr_regions,
840  sizeof(regions[0]), match_region);
841 }
static int match_region(const void *key, const void *elt)
Definition: vgic-mmio.c:821
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◆ vgic_get_mmio_region()

const struct vgic_register_region* vgic_get_mmio_region ( struct kvm_vcpu *  vcpu,
struct vgic_io_device iodev,
gpa_t  addr,
int  len 
)

Definition at line 950 of file vgic-mmio.c.

952 {
953  const struct vgic_register_region *region;
954 
955  region = vgic_find_mmio_region(iodev->regions, iodev->nr_regions,
956  addr - iodev->base_addr);
957  if (!region || !check_region(vcpu->kvm, region, addr, len))
958  return NULL;
959 
960  return region;
961 }
const struct vgic_register_region * regions
Definition: arm_vgic.h:181
gpa_t base_addr
Definition: arm_vgic.h:176
static bool check_region(const struct kvm *kvm, const struct vgic_register_region *region, gpa_t addr, int len)
Definition: vgic-mmio.c:918
const struct vgic_register_region * vgic_find_mmio_region(const struct vgic_register_region *regions, int nr_regions, unsigned int offset)
Definition: vgic-mmio.c:836
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◆ vgic_get_vmcr()

void vgic_get_vmcr ( struct kvm_vcpu *  vcpu,
struct vgic_vmcr vmcr 
)

Definition at line 851 of file vgic-mmio.c.

852 {
854  vgic_v2_get_vmcr(vcpu, vmcr);
855  else
856  vgic_v3_get_vmcr(vcpu, vmcr);
857 }
struct vgic_global kvm_vgic_global_state
@ VGIC_V2
Definition: arm_vgic.h:39
enum vgic_type type
Definition: arm_vgic.h:46
void vgic_v2_get_vmcr(struct kvm_vcpu *vcpu, struct vgic_vmcr *vmcrp)
Definition: vgic-v2.c:232
void vgic_v3_get_vmcr(struct kvm_vcpu *vcpu, struct vgic_vmcr *vmcrp)
Definition: vgic-v3.c:224
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◆ vgic_hw_irq_change_active()

static void vgic_hw_irq_change_active ( struct kvm_vcpu *  vcpu,
struct vgic_irq irq,
bool  active,
bool  is_uaccess 
)
static

Definition at line 536 of file vgic-mmio.c.

538 {
539  if (is_uaccess)
540  return;
541 
542  irq->active = active;
543  vgic_irq_set_phys_active(irq, active);
544 }
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◆ vgic_hw_irq_cpending()

static void vgic_hw_irq_cpending ( struct kvm_vcpu *  vcpu,
struct vgic_irq irq 
)
static

Definition at line 369 of file vgic-mmio.c.

370 {
371  irq->pending_latch = false;
372 
373  /*
374  * We don't want the guest to effectively mask the physical
375  * interrupt by doing a write to SPENDR followed by a write to
376  * CPENDR for HW interrupts, so we clear the active state on
377  * the physical side if the virtual interrupt is not active.
378  * This may lead to taking an additional interrupt on the
379  * host, but that should not be a problem as the worst that
380  * can happen is an additional vgic injection. We also clear
381  * the pending state to maintain proper semantics for edge HW
382  * interrupts.
383  */
384  vgic_irq_set_phys_pending(irq, false);
385  if (!irq->active)
386  vgic_irq_set_phys_active(irq, false);
387 }
void vgic_irq_set_phys_pending(struct vgic_irq *irq, bool pending)
Definition: vgic.c:173
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◆ vgic_mmio_change_active()

static void vgic_mmio_change_active ( struct kvm_vcpu *  vcpu,
struct vgic_irq irq,
bool  active 
)
static

Definition at line 546 of file vgic-mmio.c.

548 {
549  unsigned long flags;
550  struct kvm_vcpu *requester_vcpu = kvm_get_running_vcpu();
551 
552  raw_spin_lock_irqsave(&irq->irq_lock, flags);
553 
554  if (irq->hw && !vgic_irq_is_sgi(irq->intid)) {
555  vgic_hw_irq_change_active(vcpu, irq, active, !requester_vcpu);
556  } else if (irq->hw && vgic_irq_is_sgi(irq->intid)) {
557  /*
558  * GICv4.1 VSGI feature doesn't track an active state,
559  * so let's not kid ourselves, there is nothing we can
560  * do here.
561  */
562  irq->active = false;
563  } else {
564  u32 model = vcpu->kvm->arch.vgic.vgic_model;
565  u8 active_source;
566 
567  irq->active = active;
568 
569  /*
570  * The GICv2 architecture indicates that the source CPUID for
571  * an SGI should be provided during an EOI which implies that
572  * the active state is stored somewhere, but at the same time
573  * this state is not architecturally exposed anywhere and we
574  * have no way of knowing the right source.
575  *
576  * This may lead to a VCPU not being able to receive
577  * additional instances of a particular SGI after migration
578  * for a GICv2 VM on some GIC implementations. Oh well.
579  */
580  active_source = (requester_vcpu) ? requester_vcpu->vcpu_id : 0;
581 
582  if (model == KVM_DEV_TYPE_ARM_VGIC_V2 &&
583  active && vgic_irq_is_sgi(irq->intid))
584  irq->active_source = active_source;
585  }
586 
587  if (irq->active)
588  vgic_queue_irq_unlock(vcpu->kvm, irq, flags);
589  else
590  raw_spin_unlock_irqrestore(&irq->irq_lock, flags);
591 }
u8 active_source
Definition: arm_vgic.h:149
static void vgic_hw_irq_change_active(struct kvm_vcpu *vcpu, struct vgic_irq *irq, bool active, bool is_uaccess)
Definition: vgic-mmio.c:536
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◆ vgic_mmio_read_active()

unsigned long vgic_mmio_read_active ( struct kvm_vcpu *  vcpu,
gpa_t  addr,
unsigned int  len 
)

Definition at line 512 of file vgic-mmio.c.

514 {
515  u32 intid = VGIC_ADDR_TO_INTID(addr, 1);
516  u32 val;
517 
518  mutex_lock(&vcpu->kvm->arch.config_lock);
519  vgic_access_active_prepare(vcpu, intid);
520 
521  val = __vgic_mmio_read_active(vcpu, addr, len);
522 
523  vgic_access_active_finish(vcpu, intid);
524  mutex_unlock(&vcpu->kvm->arch.config_lock);
525 
526  return val;
527 }
static unsigned long __vgic_mmio_read_active(struct kvm_vcpu *vcpu, gpa_t addr, unsigned int len)
Definition: vgic-mmio.c:488
static void vgic_access_active_prepare(struct kvm_vcpu *vcpu, u32 intid)
Definition: vgic-mmio.c:471
static void vgic_access_active_finish(struct kvm_vcpu *vcpu, u32 intid)
Definition: vgic-mmio.c:480
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◆ vgic_mmio_read_config()

unsigned long vgic_mmio_read_config ( struct kvm_vcpu *  vcpu,
gpa_t  addr,
unsigned int  len 
)

Definition at line 714 of file vgic-mmio.c.

716 {
717  u32 intid = VGIC_ADDR_TO_INTID(addr, 2);
718  u32 value = 0;
719  int i;
720 
721  for (i = 0; i < len * 4; i++) {
722  struct vgic_irq *irq = vgic_get_irq(vcpu->kvm, vcpu, intid + i);
723 
724  if (irq->config == VGIC_CONFIG_EDGE)
725  value |= (2U << (i * 2));
726 
727  vgic_put_irq(vcpu->kvm, irq);
728  }
729 
730  return value;
731 }
@ VGIC_CONFIG_EDGE
Definition: arm_vgic.h:93
enum vgic_irq_config config
Definition: arm_vgic.h:152
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◆ vgic_mmio_read_enable()

unsigned long vgic_mmio_read_enable ( struct kvm_vcpu *  vcpu,
gpa_t  addr,
unsigned int  len 
)

Definition at line 96 of file vgic-mmio.c.

98 {
99  u32 intid = VGIC_ADDR_TO_INTID(addr, 1);
100  u32 value = 0;
101  int i;
102 
103  /* Loop over all IRQs affected by this read */
104  for (i = 0; i < len * 8; i++) {
105  struct vgic_irq *irq = vgic_get_irq(vcpu->kvm, vcpu, intid + i);
106 
107  if (irq->enabled)
108  value |= (1U << i);
109 
110  vgic_put_irq(vcpu->kvm, irq);
111  }
112 
113  return value;
114 }
bool enabled
Definition: arm_vgic.h:139
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◆ vgic_mmio_read_group()

unsigned long vgic_mmio_read_group ( struct kvm_vcpu *  vcpu,
gpa_t  addr,
unsigned int  len 
)

Definition at line 44 of file vgic-mmio.c.

46 {
47  u32 intid = VGIC_ADDR_TO_INTID(addr, 1);
48  u32 value = 0;
49  int i;
50 
51  /* Loop over all IRQs affected by this read */
52  for (i = 0; i < len * 8; i++) {
53  struct vgic_irq *irq = vgic_get_irq(vcpu->kvm, vcpu, intid + i);
54 
55  if (irq->group)
56  value |= BIT(i);
57 
58  vgic_put_irq(vcpu->kvm, irq);
59  }
60 
61  return value;
62 }
u8 group
Definition: arm_vgic.h:151
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◆ vgic_mmio_read_pending()

unsigned long vgic_mmio_read_pending ( struct kvm_vcpu *  vcpu,
gpa_t  addr,
unsigned int  len 
)

Definition at line 286 of file vgic-mmio.c.

288 {
289  return __read_pending(vcpu, addr, len, false);
290 }
static unsigned long __read_pending(struct kvm_vcpu *vcpu, gpa_t addr, unsigned int len, bool is_user)
Definition: vgic-mmio.c:229
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◆ vgic_mmio_read_priority()

unsigned long vgic_mmio_read_priority ( struct kvm_vcpu *  vcpu,
gpa_t  addr,
unsigned int  len 
)

Definition at line 667 of file vgic-mmio.c.

669 {
670  u32 intid = VGIC_ADDR_TO_INTID(addr, 8);
671  int i;
672  u64 val = 0;
673 
674  for (i = 0; i < len; i++) {
675  struct vgic_irq *irq = vgic_get_irq(vcpu->kvm, vcpu, intid + i);
676 
677  val |= (u64)irq->priority << (i * 8);
678 
679  vgic_put_irq(vcpu->kvm, irq);
680  }
681 
682  return val;
683 }
u8 priority
Definition: arm_vgic.h:150
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◆ vgic_mmio_read_rao()

unsigned long vgic_mmio_read_rao ( struct kvm_vcpu *  vcpu,
gpa_t  addr,
unsigned int  len 
)

Definition at line 25 of file vgic-mmio.c.

27 {
28  return -1UL;
29 }

◆ vgic_mmio_read_raz()

unsigned long vgic_mmio_read_raz ( struct kvm_vcpu *  vcpu,
gpa_t  addr,
unsigned int  len 
)

Definition at line 19 of file vgic-mmio.c.

21 {
22  return 0;
23 }

◆ vgic_mmio_uaccess_write_cactive()

int vgic_mmio_uaccess_write_cactive ( struct kvm_vcpu *  vcpu,
gpa_t  addr,
unsigned int  len,
unsigned long  val 
)

Definition at line 622 of file vgic-mmio.c.

625 {
626  __vgic_mmio_write_cactive(vcpu, addr, len, val);
627  return 0;
628 }
static void __vgic_mmio_write_cactive(struct kvm_vcpu *vcpu, gpa_t addr, unsigned int len, unsigned long val)
Definition: vgic-mmio.c:593
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◆ vgic_mmio_uaccess_write_sactive()

int vgic_mmio_uaccess_write_sactive ( struct kvm_vcpu *  vcpu,
gpa_t  addr,
unsigned int  len,
unsigned long  val 
)

Definition at line 659 of file vgic-mmio.c.

662 {
663  __vgic_mmio_write_sactive(vcpu, addr, len, val);
664  return 0;
665 }
static void __vgic_mmio_write_sactive(struct kvm_vcpu *vcpu, gpa_t addr, unsigned int len, unsigned long val)
Definition: vgic-mmio.c:630
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◆ vgic_mmio_uaccess_write_wi()

int vgic_mmio_uaccess_write_wi ( struct kvm_vcpu *  vcpu,
gpa_t  addr,
unsigned int  len,
unsigned long  val 
)

Definition at line 37 of file vgic-mmio.c.

39 {
40  /* Ignore */
41  return 0;
42 }

◆ vgic_mmio_write_cactive()

void vgic_mmio_write_cactive ( struct kvm_vcpu *  vcpu,
gpa_t  addr,
unsigned int  len,
unsigned long  val 
)

Definition at line 607 of file vgic-mmio.c.

610 {
611  u32 intid = VGIC_ADDR_TO_INTID(addr, 1);
612 
613  mutex_lock(&vcpu->kvm->arch.config_lock);
614  vgic_access_active_prepare(vcpu, intid);
615 
616  __vgic_mmio_write_cactive(vcpu, addr, len, val);
617 
618  vgic_access_active_finish(vcpu, intid);
619  mutex_unlock(&vcpu->kvm->arch.config_lock);
620 }
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◆ vgic_mmio_write_cenable()

void vgic_mmio_write_cenable ( struct kvm_vcpu *  vcpu,
gpa_t  addr,
unsigned int  len,
unsigned long  val 
)

Definition at line 165 of file vgic-mmio.c.

168 {
169  u32 intid = VGIC_ADDR_TO_INTID(addr, 1);
170  int i;
171  unsigned long flags;
172 
173  for_each_set_bit(i, &val, len * 8) {
174  struct vgic_irq *irq = vgic_get_irq(vcpu->kvm, vcpu, intid + i);
175 
176  raw_spin_lock_irqsave(&irq->irq_lock, flags);
177  if (irq->hw && vgic_irq_is_sgi(irq->intid) && irq->enabled)
178  disable_irq_nosync(irq->host_irq);
179 
180  irq->enabled = false;
181 
182  raw_spin_unlock_irqrestore(&irq->irq_lock, flags);
183  vgic_put_irq(vcpu->kvm, irq);
184  }
185 }
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◆ vgic_mmio_write_config()

void vgic_mmio_write_config ( struct kvm_vcpu *  vcpu,
gpa_t  addr,
unsigned int  len,
unsigned long  val 
)

Definition at line 733 of file vgic-mmio.c.

736 {
737  u32 intid = VGIC_ADDR_TO_INTID(addr, 2);
738  int i;
739  unsigned long flags;
740 
741  for (i = 0; i < len * 4; i++) {
742  struct vgic_irq *irq;
743 
744  /*
745  * The configuration cannot be changed for SGIs in general,
746  * for PPIs this is IMPLEMENTATION DEFINED. The arch timer
747  * code relies on PPIs being level triggered, so we also
748  * make them read-only here.
749  */
750  if (intid + i < VGIC_NR_PRIVATE_IRQS)
751  continue;
752 
753  irq = vgic_get_irq(vcpu->kvm, vcpu, intid + i);
754  raw_spin_lock_irqsave(&irq->irq_lock, flags);
755 
756  if (test_bit(i * 2 + 1, &val))
757  irq->config = VGIC_CONFIG_EDGE;
758  else
759  irq->config = VGIC_CONFIG_LEVEL;
760 
761  raw_spin_unlock_irqrestore(&irq->irq_lock, flags);
762  vgic_put_irq(vcpu->kvm, irq);
763  }
764 }
@ VGIC_CONFIG_LEVEL
Definition: arm_vgic.h:94
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◆ vgic_mmio_write_cpending()

void vgic_mmio_write_cpending ( struct kvm_vcpu *  vcpu,
gpa_t  addr,
unsigned int  len,
unsigned long  val 
)

Definition at line 440 of file vgic-mmio.c.

443 {
444  __clear_pending(vcpu, addr, len, val, false);
445 }
static void __clear_pending(struct kvm_vcpu *vcpu, gpa_t addr, unsigned int len, unsigned long val, bool is_user)
Definition: vgic-mmio.c:389
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◆ vgic_mmio_write_group()

void vgic_mmio_write_group ( struct kvm_vcpu *  vcpu,
gpa_t  addr,
unsigned int  len,
unsigned long  val 
)

Definition at line 69 of file vgic-mmio.c.

71 {
72  u32 intid = VGIC_ADDR_TO_INTID(addr, 1);
73  int i;
74  unsigned long flags;
75 
76  for (i = 0; i < len * 8; i++) {
77  struct vgic_irq *irq = vgic_get_irq(vcpu->kvm, vcpu, intid + i);
78 
79  raw_spin_lock_irqsave(&irq->irq_lock, flags);
80  irq->group = !!(val & BIT(i));
81  if (irq->hw && vgic_irq_is_sgi(irq->intid)) {
82  vgic_update_vsgi(irq);
83  raw_spin_unlock_irqrestore(&irq->irq_lock, flags);
84  } else {
85  vgic_queue_irq_unlock(vcpu->kvm, irq, flags);
86  }
87 
88  vgic_put_irq(vcpu->kvm, irq);
89  }
90 }
static void vgic_update_vsgi(struct vgic_irq *irq)
Definition: vgic-mmio.c:64
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◆ vgic_mmio_write_priority()

void vgic_mmio_write_priority ( struct kvm_vcpu *  vcpu,
gpa_t  addr,
unsigned int  len,
unsigned long  val 
)

Definition at line 692 of file vgic-mmio.c.

695 {
696  u32 intid = VGIC_ADDR_TO_INTID(addr, 8);
697  int i;
698  unsigned long flags;
699 
700  for (i = 0; i < len; i++) {
701  struct vgic_irq *irq = vgic_get_irq(vcpu->kvm, vcpu, intid + i);
702 
703  raw_spin_lock_irqsave(&irq->irq_lock, flags);
704  /* Narrow the priority range to what we actually support */
705  irq->priority = (val >> (i * 8)) & GENMASK(7, 8 - VGIC_PRI_BITS);
706  if (irq->hw && vgic_irq_is_sgi(irq->intid))
707  vgic_update_vsgi(irq);
708  raw_spin_unlock_irqrestore(&irq->irq_lock, flags);
709 
710  vgic_put_irq(vcpu->kvm, irq);
711  }
712 }
#define VGIC_PRI_BITS
Definition: vgic.h:19
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◆ vgic_mmio_write_sactive()

void vgic_mmio_write_sactive ( struct kvm_vcpu *  vcpu,
gpa_t  addr,
unsigned int  len,
unsigned long  val 
)

Definition at line 644 of file vgic-mmio.c.

647 {
648  u32 intid = VGIC_ADDR_TO_INTID(addr, 1);
649 
650  mutex_lock(&vcpu->kvm->arch.config_lock);
651  vgic_access_active_prepare(vcpu, intid);
652 
653  __vgic_mmio_write_sactive(vcpu, addr, len, val);
654 
655  vgic_access_active_finish(vcpu, intid);
656  mutex_unlock(&vcpu->kvm->arch.config_lock);
657 }
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◆ vgic_mmio_write_senable()

void vgic_mmio_write_senable ( struct kvm_vcpu *  vcpu,
gpa_t  addr,
unsigned int  len,
unsigned long  val 
)

Definition at line 116 of file vgic-mmio.c.

119 {
120  u32 intid = VGIC_ADDR_TO_INTID(addr, 1);
121  int i;
122  unsigned long flags;
123 
124  for_each_set_bit(i, &val, len * 8) {
125  struct vgic_irq *irq = vgic_get_irq(vcpu->kvm, vcpu, intid + i);
126 
127  raw_spin_lock_irqsave(&irq->irq_lock, flags);
128  if (irq->hw && vgic_irq_is_sgi(irq->intid)) {
129  if (!irq->enabled) {
130  struct irq_data *data;
131 
132  irq->enabled = true;
133  data = &irq_to_desc(irq->host_irq)->irq_data;
134  while (irqd_irq_disabled(data))
135  enable_irq(irq->host_irq);
136  }
137 
138  raw_spin_unlock_irqrestore(&irq->irq_lock, flags);
139  vgic_put_irq(vcpu->kvm, irq);
140 
141  continue;
142  } else if (vgic_irq_is_mapped_level(irq)) {
143  bool was_high = irq->line_level;
144 
145  /*
146  * We need to update the state of the interrupt because
147  * the guest might have changed the state of the device
148  * while the interrupt was disabled at the VGIC level.
149  */
151  /*
152  * Deactivate the physical interrupt so the GIC will let
153  * us know when it is asserted again.
154  */
155  if (!irq->active && was_high && !irq->line_level)
156  vgic_irq_set_phys_active(irq, false);
157  }
158  irq->enabled = true;
159  vgic_queue_irq_unlock(vcpu->kvm, irq, flags);
160 
161  vgic_put_irq(vcpu->kvm, irq);
162  }
163 }
bool line_level
Definition: arm_vgic.h:134
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◆ vgic_mmio_write_spending()

void vgic_mmio_write_spending ( struct kvm_vcpu *  vcpu,
gpa_t  addr,
unsigned int  len,
unsigned long  val 
)

Definition at line 353 of file vgic-mmio.c.

356 {
357  __set_pending(vcpu, addr, len, val, false);
358 }
static void __set_pending(struct kvm_vcpu *vcpu, gpa_t addr, unsigned int len, unsigned long val, bool is_user)
Definition: vgic-mmio.c:304
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◆ vgic_mmio_write_wi()

void vgic_mmio_write_wi ( struct kvm_vcpu *  vcpu,
gpa_t  addr,
unsigned int  len,
unsigned long  val 
)

Definition at line 31 of file vgic-mmio.c.

33 {
34  /* Ignore */
35 }

◆ vgic_read_irq_line_level_info()

u32 vgic_read_irq_line_level_info ( struct kvm_vcpu *  vcpu,
u32  intid 
)

Definition at line 766 of file vgic-mmio.c.

767 {
768  int i;
769  u32 val = 0;
770  int nr_irqs = vcpu->kvm->arch.vgic.nr_spis + VGIC_NR_PRIVATE_IRQS;
771 
772  for (i = 0; i < 32; i++) {
773  struct vgic_irq *irq;
774 
775  if ((intid + i) < VGIC_NR_SGIS || (intid + i) >= nr_irqs)
776  continue;
777 
778  irq = vgic_get_irq(vcpu->kvm, vcpu, intid + i);
779  if (irq->config == VGIC_CONFIG_LEVEL && irq->line_level)
780  val |= (1U << i);
781 
782  vgic_put_irq(vcpu->kvm, irq);
783  }
784 
785  return val;
786 }
#define VGIC_NR_SGIS
Definition: arm_vgic.h:25
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◆ vgic_register_dist_iodev()

int vgic_register_dist_iodev ( struct kvm *  kvm,
gpa_t  dist_base_address,
enum vgic_type  type 
)

Definition at line 1080 of file vgic-mmio.c.

1082 {
1083  struct vgic_io_device *io_device = &kvm->arch.vgic.dist_iodev;
1084  unsigned int len;
1085 
1086  switch (type) {
1087  case VGIC_V2:
1088  len = vgic_v2_init_dist_iodev(io_device);
1089  break;
1090  case VGIC_V3:
1091  len = vgic_v3_init_dist_iodev(io_device);
1092  break;
1093  default:
1094  BUG_ON(1);
1095  }
1096 
1097  io_device->base_addr = dist_base_address;
1098  io_device->iodev_type = IODEV_DIST;
1099  io_device->redist_vcpu = NULL;
1100 
1101  return kvm_io_bus_register_dev(kvm, KVM_MMIO_BUS, dist_base_address,
1102  len, &io_device->dev);
1103 }
@ VGIC_V3
Definition: arm_vgic.h:40
int kvm_io_bus_register_dev(struct kvm *kvm, enum kvm_bus bus_idx, gpa_t addr, int len, struct kvm_io_device *dev)
Definition: kvm_main.c:5897
unsigned int vgic_v2_init_dist_iodev(struct vgic_io_device *dev)
Definition: vgic-mmio-v2.c:487
unsigned int vgic_v3_init_dist_iodev(struct vgic_io_device *dev)
Definition: vgic-mmio-v3.c:727
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◆ vgic_set_vmcr()

void vgic_set_vmcr ( struct kvm_vcpu *  vcpu,
struct vgic_vmcr vmcr 
)

Definition at line 843 of file vgic-mmio.c.

844 {
846  vgic_v2_set_vmcr(vcpu, vmcr);
847  else
848  vgic_v3_set_vmcr(vcpu, vmcr);
849 }
void vgic_v2_set_vmcr(struct kvm_vcpu *vcpu, struct vgic_vmcr *vmcrp)
Definition: vgic-v2.c:205
void vgic_v3_set_vmcr(struct kvm_vcpu *vcpu, struct vgic_vmcr *vmcrp)
Definition: vgic-v3.c:194
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◆ vgic_uaccess()

int vgic_uaccess ( struct kvm_vcpu *  vcpu,
struct vgic_io_device dev,
bool  is_write,
int  offset,
u32 *  val 
)

Definition at line 1005 of file vgic-mmio.c.

1007 {
1008  if (is_write)
1009  return vgic_uaccess_write(vcpu, dev, offset, val);
1010  else
1011  return vgic_uaccess_read(vcpu, dev, offset, val);
1012 }
static int vgic_uaccess_write(struct kvm_vcpu *vcpu, struct vgic_io_device *iodev, gpa_t addr, const u32 *val)
Definition: vgic-mmio.c:984
static int vgic_uaccess_read(struct kvm_vcpu *vcpu, struct vgic_io_device *iodev, gpa_t addr, u32 *val)
Definition: vgic-mmio.c:963
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◆ vgic_uaccess_read()

static int vgic_uaccess_read ( struct kvm_vcpu *  vcpu,
struct vgic_io_device iodev,
gpa_t  addr,
u32 *  val 
)
static

Definition at line 963 of file vgic-mmio.c.

965 {
966  const struct vgic_register_region *region;
967  struct kvm_vcpu *r_vcpu;
968 
969  region = vgic_get_mmio_region(vcpu, iodev, addr, sizeof(u32));
970  if (!region) {
971  *val = 0;
972  return 0;
973  }
974 
975  r_vcpu = iodev->redist_vcpu ? iodev->redist_vcpu : vcpu;
976  if (region->uaccess_read)
977  *val = region->uaccess_read(r_vcpu, addr, sizeof(u32));
978  else
979  *val = region->read(r_vcpu, addr, sizeof(u32));
980 
981  return 0;
982 }
unsigned long(* uaccess_read)(struct kvm_vcpu *vcpu, gpa_t addr, unsigned int len)
Definition: vgic-mmio.h:26
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◆ vgic_uaccess_read_active()

unsigned long vgic_uaccess_read_active ( struct kvm_vcpu *  vcpu,
gpa_t  addr,
unsigned int  len 
)

Definition at line 529 of file vgic-mmio.c.

531 {
532  return __vgic_mmio_read_active(vcpu, addr, len);
533 }
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◆ vgic_uaccess_read_pending()

unsigned long vgic_uaccess_read_pending ( struct kvm_vcpu *  vcpu,
gpa_t  addr,
unsigned int  len 
)

Definition at line 292 of file vgic-mmio.c.

294 {
295  return __read_pending(vcpu, addr, len, true);
296 }
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◆ vgic_uaccess_write()

static int vgic_uaccess_write ( struct kvm_vcpu *  vcpu,
struct vgic_io_device iodev,
gpa_t  addr,
const u32 *  val 
)
static

Definition at line 984 of file vgic-mmio.c.

986 {
987  const struct vgic_register_region *region;
988  struct kvm_vcpu *r_vcpu;
989 
990  region = vgic_get_mmio_region(vcpu, iodev, addr, sizeof(u32));
991  if (!region)
992  return 0;
993 
994  r_vcpu = iodev->redist_vcpu ? iodev->redist_vcpu : vcpu;
995  if (region->uaccess_write)
996  return region->uaccess_write(r_vcpu, addr, sizeof(u32), *val);
997 
998  region->write(r_vcpu, addr, sizeof(u32), *val);
999  return 0;
1000 }
int(* uaccess_write)(struct kvm_vcpu *vcpu, gpa_t addr, unsigned int len, unsigned long val)
Definition: vgic-mmio.h:29
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◆ vgic_uaccess_write_cenable()

int vgic_uaccess_write_cenable ( struct kvm_vcpu *  vcpu,
gpa_t  addr,
unsigned int  len,
unsigned long  val 
)

Definition at line 208 of file vgic-mmio.c.

211 {
212  u32 intid = VGIC_ADDR_TO_INTID(addr, 1);
213  int i;
214  unsigned long flags;
215 
216  for_each_set_bit(i, &val, len * 8) {
217  struct vgic_irq *irq = vgic_get_irq(vcpu->kvm, vcpu, intid + i);
218 
219  raw_spin_lock_irqsave(&irq->irq_lock, flags);
220  irq->enabled = false;
221  raw_spin_unlock_irqrestore(&irq->irq_lock, flags);
222 
223  vgic_put_irq(vcpu->kvm, irq);
224  }
225 
226  return 0;
227 }
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◆ vgic_uaccess_write_cpending()

int vgic_uaccess_write_cpending ( struct kvm_vcpu *  vcpu,
gpa_t  addr,
unsigned int  len,
unsigned long  val 
)

Definition at line 447 of file vgic-mmio.c.

450 {
451  __clear_pending(vcpu, addr, len, val, true);
452  return 0;
453 }
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◆ vgic_uaccess_write_senable()

int vgic_uaccess_write_senable ( struct kvm_vcpu *  vcpu,
gpa_t  addr,
unsigned int  len,
unsigned long  val 
)

Definition at line 187 of file vgic-mmio.c.

190 {
191  u32 intid = VGIC_ADDR_TO_INTID(addr, 1);
192  int i;
193  unsigned long flags;
194 
195  for_each_set_bit(i, &val, len * 8) {
196  struct vgic_irq *irq = vgic_get_irq(vcpu->kvm, vcpu, intid + i);
197 
198  raw_spin_lock_irqsave(&irq->irq_lock, flags);
199  irq->enabled = true;
200  vgic_queue_irq_unlock(vcpu->kvm, irq, flags);
201 
202  vgic_put_irq(vcpu->kvm, irq);
203  }
204 
205  return 0;
206 }
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◆ vgic_uaccess_write_spending()

int vgic_uaccess_write_spending ( struct kvm_vcpu *  vcpu,
gpa_t  addr,
unsigned int  len,
unsigned long  val 
)

Definition at line 360 of file vgic-mmio.c.

363 {
364  __set_pending(vcpu, addr, len, val, true);
365  return 0;
366 }
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◆ vgic_update_vsgi()

static void vgic_update_vsgi ( struct vgic_irq irq)
static

Definition at line 64 of file vgic-mmio.c.

65 {
66  WARN_ON(its_prop_update_vsgi(irq->host_irq, irq->priority, irq->group));
67 }
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◆ vgic_write_irq_line_level_info()

void vgic_write_irq_line_level_info ( struct kvm_vcpu *  vcpu,
u32  intid,
const u32  val 
)

Definition at line 788 of file vgic-mmio.c.

790 {
791  int i;
792  int nr_irqs = vcpu->kvm->arch.vgic.nr_spis + VGIC_NR_PRIVATE_IRQS;
793  unsigned long flags;
794 
795  for (i = 0; i < 32; i++) {
796  struct vgic_irq *irq;
797  bool new_level;
798 
799  if ((intid + i) < VGIC_NR_SGIS || (intid + i) >= nr_irqs)
800  continue;
801 
802  irq = vgic_get_irq(vcpu->kvm, vcpu, intid + i);
803 
804  /*
805  * Line level is set irrespective of irq type
806  * (level or edge) to avoid dependency that VM should
807  * restore irq config before line level.
808  */
809  new_level = !!(val & (1U << i));
810  raw_spin_lock_irqsave(&irq->irq_lock, flags);
811  irq->line_level = new_level;
812  if (new_level)
813  vgic_queue_irq_unlock(vcpu->kvm, irq, flags);
814  else
815  raw_spin_unlock_irqrestore(&irq->irq_lock, flags);
816 
817  vgic_put_irq(vcpu->kvm, irq);
818  }
819 }
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Variable Documentation

◆ kvm_io_gic_ops

const struct kvm_io_device_ops kvm_io_gic_ops
Initial value:
= {
}
static int dispatch_mmio_read(struct kvm_vcpu *vcpu, struct kvm_io_device *dev, gpa_t addr, int len, void *val)
Definition: vgic-mmio.c:1014
static int dispatch_mmio_write(struct kvm_vcpu *vcpu, struct kvm_io_device *dev, gpa_t addr, int len, const void *val)
Definition: vgic-mmio.c:1046

Definition at line 1046 of file vgic-mmio.c.