arm_vgic.h File Reference

#include <linux/bits.h>
#include <linux/kvm.h>
#include <linux/irqreturn.h>
#include <linux/kref.h>
#include <linux/mutex.h>
#include <linux/spinlock.h>
#include <linux/static_key.h>
#include <linux/types.h>
#include <kvm/iodev.h>
#include <linux/list.h>
#include <linux/jump_label.h>
#include <linux/irqchip/arm-gic-v4.h>

Include dependency graph for arm_vgic.h:

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Classes
struct	vgic_global
struct	irq_ops
struct	vgic_irq
struct	vgic_io_device
struct	vgic_its
struct	vgic_redist_region
struct	vgic_dist
struct	vgic_v2_cpu_if
struct	vgic_v3_cpu_if
struct	vgic_cpu

Macros
#define	VGIC_V3_MAX_CPUS   512
#define	VGIC_V2_MAX_CPUS   8
#define	VGIC_NR_IRQS_LEGACY   256
#define	VGIC_NR_SGIS   16
#define	VGIC_NR_PPIS   16
#define	VGIC_NR_PRIVATE_IRQS   (VGIC_NR_SGIS + VGIC_NR_PPIS)
#define	VGIC_MAX_PRIVATE   (VGIC_NR_PRIVATE_IRQS - 1)
#define	VGIC_MAX_SPI   1019
#define	VGIC_MAX_RESERVED   1023
#define	VGIC_MIN_LPI   8192
#define	KVM_IRQCHIP_NUM_PINS   (1020 - 32)
#define	irq_is_ppi(irq)   ((irq) >= VGIC_NR_SGIS && (irq) < VGIC_NR_PRIVATE_IRQS)
#define	irq_is_spi(irq)
#define	VGIC_V2_MAX_LRS   (1 << 6)
#define	VGIC_V3_MAX_LRS   16
#define	VGIC_V3_LR_INDEX(lr)   (VGIC_V3_MAX_LRS - 1 - lr)
#define	VGIC_IRQ_SW_RESAMPLE   BIT(0) /* Clear the active state for resampling */
#define	KVM_VGIC_IMP_REV_2   2 /* GICv2 restorable groups */
#define	KVM_VGIC_IMP_REV_3   3 /* GICv3 GICR_CTLR.{IW,CES,RWP} */
#define	KVM_VGIC_IMP_REV_LATEST   KVM_VGIC_IMP_REV_3
#define	irqchip_in_kernel(k)   (!!((k)->arch.vgic.in_kernel))
#define	vgic_initialized(k)   ((k)->arch.vgic.initialized)
#define	vgic_ready(k)   ((k)->arch.vgic.ready)
#define	vgic_valid_spi(k, i)

Enumerations
enum	vgic_type { VGIC_V2 , VGIC_V3 }
enum	vgic_irq_config { VGIC_CONFIG_EDGE = 0 , VGIC_CONFIG_LEVEL }
enum	iodev_type { IODEV_CPUIF , IODEV_DIST , IODEV_REDIST , IODEV_ITS }

Functions
static bool	vgic_irq_needs_resampling (struct vgic_irq *irq)
int	kvm_set_legacy_vgic_v2_addr (struct kvm *kvm, struct kvm_arm_device_addr *dev_addr)
void	kvm_vgic_early_init (struct kvm *kvm)
int	kvm_vgic_vcpu_init (struct kvm_vcpu *vcpu)
int	kvm_vgic_create (struct kvm *kvm, u32 type)
void	kvm_vgic_destroy (struct kvm *kvm)
void	kvm_vgic_vcpu_destroy (struct kvm_vcpu *vcpu)
int	kvm_vgic_map_resources (struct kvm *kvm)
int	kvm_vgic_hyp_init (void)
void	kvm_vgic_init_cpu_hardware (void)
int	kvm_vgic_inject_irq (struct kvm *kvm, struct kvm_vcpu *vcpu, unsigned int intid, bool level, void *owner)
int	kvm_vgic_map_phys_irq (struct kvm_vcpu *vcpu, unsigned int host_irq, u32 vintid, struct irq_ops *ops)
int	kvm_vgic_unmap_phys_irq (struct kvm_vcpu *vcpu, unsigned int vintid)
int	kvm_vgic_get_map (struct kvm_vcpu *vcpu, unsigned int vintid)
bool	kvm_vgic_map_is_active (struct kvm_vcpu *vcpu, unsigned int vintid)
int	kvm_vgic_vcpu_pending_irq (struct kvm_vcpu *vcpu)
void	kvm_vgic_load (struct kvm_vcpu *vcpu)
void	kvm_vgic_put (struct kvm_vcpu *vcpu)
void	kvm_vgic_vmcr_sync (struct kvm_vcpu *vcpu)
bool	kvm_vcpu_has_pending_irqs (struct kvm_vcpu *vcpu)
void	kvm_vgic_sync_hwstate (struct kvm_vcpu *vcpu)
void	kvm_vgic_flush_hwstate (struct kvm_vcpu *vcpu)
void	kvm_vgic_reset_mapped_irq (struct kvm_vcpu *vcpu, u32 vintid)
void	vgic_v3_dispatch_sgi (struct kvm_vcpu *vcpu, u64 reg, bool allow_group1)
static int	kvm_vgic_get_max_vcpus (void)
int	kvm_vgic_setup_default_irq_routing (struct kvm *kvm)
int	kvm_vgic_set_owner (struct kvm_vcpu *vcpu, unsigned int intid, void *owner)
int	kvm_vgic_v4_set_forwarding (struct kvm *kvm, int irq, struct kvm_kernel_irq_routing_entry *irq_entry)
int	kvm_vgic_v4_unset_forwarding (struct kvm *kvm, int irq, struct kvm_kernel_irq_routing_entry *irq_entry)
int	vgic_v4_load (struct kvm_vcpu *vcpu)
void	vgic_v4_commit (struct kvm_vcpu *vcpu)
int	vgic_v4_put (struct kvm_vcpu *vcpu)
void	kvm_vgic_cpu_up (void)
void	kvm_vgic_cpu_down (void)

Variables
struct vgic_global	kvm_vgic_global_state
struct static_key_false	vgic_v2_cpuif_trap
struct static_key_false	vgic_v3_cpuif_trap

Macro Definition Documentation

irq_is_ppi

#define irq_is_ppi

(

irq

)

((irq) >= VGIC_NR_SGIS && (irq) < VGIC_NR_PRIVATE_IRQS)

Definition at line 34 of file arm_vgic.h.

irq_is_spi

#define irq_is_spi

(

irq

)

Value:

             ((irq) >= VGIC_NR_PRIVATE_IRQS && \
             (irq) <= VGIC_MAX_SPI)

Definition at line 35 of file arm_vgic.h.

irqchip_in_kernel

#define irqchip_in_kernel

(

k

)

(!!((k)->arch.vgic.in_kernel))

Definition at line 392 of file arm_vgic.h.

KVM_IRQCHIP_NUM_PINS

#define KVM_IRQCHIP_NUM_PINS   (1020 - 32)

Definition at line 32 of file arm_vgic.h.

KVM_VGIC_IMP_REV_2

#define KVM_VGIC_IMP_REV_2   2 /* GICv2 restorable groups */

Definition at line 234 of file arm_vgic.h.

KVM_VGIC_IMP_REV_3

#define KVM_VGIC_IMP_REV_3   3 /* GICv3 GICR_CTLR.{IW,CES,RWP} */

Definition at line 235 of file arm_vgic.h.

KVM_VGIC_IMP_REV_LATEST

#define KVM_VGIC_IMP_REV_LATEST   KVM_VGIC_IMP_REV_3

Definition at line 236 of file arm_vgic.h.

vgic_initialized

#define vgic_initialized

(

k

)

((k)->arch.vgic.initialized)

Definition at line 393 of file arm_vgic.h.

VGIC_IRQ_SW_RESAMPLE

#define VGIC_IRQ_SW_RESAMPLE   BIT(0) /* Clear the active state for resampling */

Definition at line 107 of file arm_vgic.h.

VGIC_MAX_PRIVATE

#define VGIC_MAX_PRIVATE   (VGIC_NR_PRIVATE_IRQS - 1)

Definition at line 28 of file arm_vgic.h.

VGIC_MAX_RESERVED

#define VGIC_MAX_RESERVED   1023

Definition at line 30 of file arm_vgic.h.

VGIC_MAX_SPI

#define VGIC_MAX_SPI   1019

Definition at line 29 of file arm_vgic.h.

VGIC_MIN_LPI

#define VGIC_MIN_LPI   8192

Definition at line 31 of file arm_vgic.h.

VGIC_NR_IRQS_LEGACY

#define VGIC_NR_IRQS_LEGACY   256

Definition at line 24 of file arm_vgic.h.

VGIC_NR_PPIS

#define VGIC_NR_PPIS   16

Definition at line 26 of file arm_vgic.h.

VGIC_NR_PRIVATE_IRQS

#define VGIC_NR_PRIVATE_IRQS   (VGIC_NR_SGIS + VGIC_NR_PPIS)

Definition at line 27 of file arm_vgic.h.

VGIC_NR_SGIS

#define VGIC_NR_SGIS   16

Definition at line 25 of file arm_vgic.h.

vgic_ready

#define vgic_ready

(

k

)

((k)->arch.vgic.ready)

Definition at line 394 of file arm_vgic.h.

VGIC_V2_MAX_CPUS

#define VGIC_V2_MAX_CPUS   8

Definition at line 23 of file arm_vgic.h.

VGIC_V2_MAX_LRS

#define VGIC_V2_MAX_LRS   (1 << 6)

Definition at line 88 of file arm_vgic.h.

VGIC_V3_LR_INDEX

#define VGIC_V3_LR_INDEX

(

lr

)

(VGIC_V3_MAX_LRS - 1 - lr)

Definition at line 90 of file arm_vgic.h.

VGIC_V3_MAX_CPUS

#define VGIC_V3_MAX_CPUS   512

Definition at line 22 of file arm_vgic.h.

VGIC_V3_MAX_LRS

#define VGIC_V3_MAX_LRS   16

Definition at line 89 of file arm_vgic.h.

vgic_valid_spi

#define vgic_valid_spi	(		k,
			i
	)

Value:

            (((i) >= VGIC_NR_PRIVATE_IRQS) && \
            ((i) < (k)->arch.vgic.nr_spis + VGIC_NR_PRIVATE_IRQS))

Definition at line 395 of file arm_vgic.h.

Enumeration Type Documentation

iodev_type

enum iodev_type

Enumerator
IODEV_CPUIF
IODEV_DIST
IODEV_REDIST
IODEV_ITS

Definition at line 168 of file arm_vgic.h.

                {
    IODEV_CPUIF,
    IODEV_DIST,
    IODEV_REDIST,
    IODEV_ITS
};

vgic_irq_config

enum vgic_irq_config

Enumerator
VGIC_CONFIG_EDGE
VGIC_CONFIG_LEVEL

Definition at line 92 of file arm_vgic.h.

                     {
    VGIC_CONFIG_EDGE = 0,
    VGIC_CONFIG_LEVEL
};

vgic_type

enum vgic_type

Enumerator
VGIC_V2
VGIC_V3

Definition at line 38 of file arm_vgic.h.

               {
    VGIC_V2,        /* Good ol' GICv2 */
    VGIC_V3,        /* New fancy GICv3 */
};

Function Documentation

kvm_set_legacy_vgic_v2_addr()

int kvm_set_legacy_vgic_v2_addr	(	struct kvm *	kvm,
		struct kvm_arm_device_addr *	dev_addr
	)

Definition at line 45 of file vgic-kvm-device.c.

{
    struct vgic_dist *vgic = &kvm->arch.vgic;
    int r;
 
    mutex_lock(&kvm->arch.config_lock);
    switch (FIELD_GET(KVM_ARM_DEVICE_TYPE_MASK, dev_addr->id)) {
    case KVM_VGIC_V2_ADDR_TYPE_DIST:
        r = vgic_check_type(kvm, KVM_DEV_TYPE_ARM_VGIC_V2);
        if (!r)
            r = vgic_check_iorange(kvm, vgic->vgic_dist_base, dev_addr->addr,
                           SZ_4K, KVM_VGIC_V2_DIST_SIZE);
        if (!r)
            vgic->vgic_dist_base = dev_addr->addr;
        break;
    case KVM_VGIC_V2_ADDR_TYPE_CPU:
        r = vgic_check_type(kvm, KVM_DEV_TYPE_ARM_VGIC_V2);
        if (!r)
            r = vgic_check_iorange(kvm, vgic->vgic_cpu_base, dev_addr->addr,
                           SZ_4K, KVM_VGIC_V2_CPU_SIZE);
        if (!r)
            vgic->vgic_cpu_base = dev_addr->addr;
        break;
    default:
        r = -ENODEV;
    }
 
    mutex_unlock(&kvm->arch.config_lock);
 
    return r;
}

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kvm_vcpu_has_pending_irqs()

bool kvm_vcpu_has_pending_irqs

(

struct kvm_vcpu *

vcpu

)

kvm_vgic_cpu_down()

void kvm_vgic_cpu_down

(

void

)

Definition at line 513 of file vgic-init.c.

{
    disable_percpu_irq(kvm_vgic_global_state.maint_irq);
}

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kvm_vgic_cpu_up()

void kvm_vgic_cpu_up

(

void

)

Definition at line 507 of file vgic-init.c.

{
    enable_percpu_irq(kvm_vgic_global_state.maint_irq, 0);
}

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kvm_vgic_create()

int kvm_vgic_create	(	struct kvm *	kvm,
		u32	type
	)

kvm_vgic_create: triggered by the instantiation of the VGIC device by user space, either through the legacy KVM_CREATE_IRQCHIP ioctl (v2 only) or through the generic KVM_CREATE_DEVICE API ioctl. irqchip_in_kernel() tells you if this function succeeded or not. @kvm: kvm struct pointer @type: KVM_DEV_TYPE_ARM_VGIC_V[23]

Definition at line 71 of file vgic-init.c.

{
    struct kvm_vcpu *vcpu;
    unsigned long i;
    int ret;
 
    /*
     * This function is also called by the KVM_CREATE_IRQCHIP handler,
     * which had no chance yet to check the availability of the GICv2
     * emulation. So check this here again. KVM_CREATE_DEVICE does
     * the proper checks already.
     */
    if (type == KVM_DEV_TYPE_ARM_VGIC_V2 &&
        !kvm_vgic_global_state.can_emulate_gicv2)
        return -ENODEV;
 
    /* Must be held to avoid race with vCPU creation */
    lockdep_assert_held(&kvm->lock);
 
    ret = -EBUSY;
    if (!lock_all_vcpus(kvm))
        return ret;
 
    mutex_lock(&kvm->arch.config_lock);
 
    if (irqchip_in_kernel(kvm)) {
        ret = -EEXIST;
        goto out_unlock;
    }
 
    kvm_for_each_vcpu(i, vcpu, kvm) {
        if (vcpu_has_run_once(vcpu))
            goto out_unlock;
    }
    ret = 0;
 
    if (type == KVM_DEV_TYPE_ARM_VGIC_V2)
        kvm->max_vcpus = VGIC_V2_MAX_CPUS;
    else
        kvm->max_vcpus = VGIC_V3_MAX_CPUS;
 
    if (atomic_read(&kvm->online_vcpus) > kvm->max_vcpus) {
        ret = -E2BIG;
        goto out_unlock;
    }
 
    kvm->arch.vgic.in_kernel = true;
    kvm->arch.vgic.vgic_model = type;
 
    kvm->arch.vgic.vgic_dist_base = VGIC_ADDR_UNDEF;
 
    if (type == KVM_DEV_TYPE_ARM_VGIC_V2)
        kvm->arch.vgic.vgic_cpu_base = VGIC_ADDR_UNDEF;
    else
        INIT_LIST_HEAD(&kvm->arch.vgic.rd_regions);
 
out_unlock:
    mutex_unlock(&kvm->arch.config_lock);
    unlock_all_vcpus(kvm);
    return ret;
}

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kvm_vgic_destroy()

void kvm_vgic_destroy

(

struct kvm *

kvm

)

Definition at line 397 of file vgic-init.c.

{
    struct kvm_vcpu *vcpu;
    unsigned long i;
 
    mutex_lock(&kvm->slots_lock);
 
    vgic_debug_destroy(kvm);
 
    kvm_for_each_vcpu(i, vcpu, kvm)
        __kvm_vgic_vcpu_destroy(vcpu);
 
    mutex_lock(&kvm->arch.config_lock);
 
    kvm_vgic_dist_destroy(kvm);
 
    mutex_unlock(&kvm->arch.config_lock);
    mutex_unlock(&kvm->slots_lock);
}

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kvm_vgic_early_init()

void kvm_vgic_early_init

(

struct kvm *

kvm

)

kvm_vgic_early_init() - Initialize static VGIC VCPU data structures @kvm: The VM whose VGIC districutor should be initialized

Only do initialization of static structures that don't require any allocation or sizing information from userspace. vgic_init() called kvm_vgic_dist_init() which takes care of the rest.

Definition at line 52 of file vgic-init.c.

{
    struct vgic_dist *dist = &kvm->arch.vgic;
 
    INIT_LIST_HEAD(&dist->lpi_list_head);
    INIT_LIST_HEAD(&dist->lpi_translation_cache);
    raw_spin_lock_init(&dist->lpi_list_lock);
}

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kvm_vgic_flush_hwstate()

void kvm_vgic_flush_hwstate

(

struct kvm_vcpu *

vcpu

)

Definition at line 905 of file vgic.c.

{
    /*
     * If there are no virtual interrupts active or pending for this
     * VCPU, then there is no work to do and we can bail out without
     * taking any lock.  There is a potential race with someone injecting
     * interrupts to the VCPU, but it is a benign race as the VCPU will
     * either observe the new interrupt before or after doing this check,
     * and introducing additional synchronization mechanism doesn't change
     * this.
     *
     * Note that we still need to go through the whole thing if anything
     * can be directly injected (GICv4).
     */
    if (list_empty(&vcpu->arch.vgic_cpu.ap_list_head) &&
        !vgic_supports_direct_msis(vcpu->kvm))
        return;
 
    DEBUG_SPINLOCK_BUG_ON(!irqs_disabled());
 
    if (!list_empty(&vcpu->arch.vgic_cpu.ap_list_head)) {
        raw_spin_lock(&vcpu->arch.vgic_cpu.ap_list_lock);
        vgic_flush_lr_state(vcpu);
        raw_spin_unlock(&vcpu->arch.vgic_cpu.ap_list_lock);
    }
 
    if (can_access_vgic_from_kernel())
        vgic_restore_state(vcpu);
 
    if (vgic_supports_direct_msis(vcpu->kvm))
        vgic_v4_commit(vcpu);
}

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kvm_vgic_get_map()

int kvm_vgic_get_map	(	struct kvm_vcpu *	vcpu,
		unsigned int	vintid
	)

Definition at line 576 of file vgic.c.

{
    struct vgic_irq *irq = vgic_get_irq(vcpu->kvm, vcpu, vintid);
    unsigned long flags;
    int ret = -1;
 
    raw_spin_lock_irqsave(&irq->irq_lock, flags);
    if (irq->hw)
        ret = irq->hwintid;
    raw_spin_unlock_irqrestore(&irq->irq_lock, flags);
 
    vgic_put_irq(vcpu->kvm, irq);
    return ret;
}

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kvm_vgic_get_max_vcpus()

static int kvm_vgic_get_max_vcpus ( void  )

inlinestatic

kvm_vgic_get_max_vcpus - Get the maximum number of VCPUs allowed by HW

The host's GIC naturally limits the maximum amount of VCPUs a guest can use.

Definition at line 411 of file arm_vgic.h.

{
    return kvm_vgic_global_state.max_gic_vcpus;
}

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kvm_vgic_hyp_init()

int kvm_vgic_hyp_init

(

void

)

kvm_vgic_hyp_init: populates the kvm_vgic_global_state variable according to the host GIC model. Accordingly calls either vgic_v2/v3_probe which registers the KVM_DEVICE that can be instantiated by a guest later on .

Definition at line 564 of file vgic-init.c.

{
    bool has_mask;
    int ret;
 
    if (!gic_kvm_info)
        return -ENODEV;
 
    has_mask = !gic_kvm_info->no_maint_irq_mask;
 
    if (has_mask && !gic_kvm_info->maint_irq) {
        kvm_err("No vgic maintenance irq\n");
        return -ENXIO;
    }
 
    /*
     * If we get one of these oddball non-GICs, taint the kernel,
     * as we have no idea of how they *really* behave.
     */
    if (gic_kvm_info->no_hw_deactivation) {
        kvm_info("Non-architectural vgic, tainting kernel\n");
        add_taint(TAINT_CPU_OUT_OF_SPEC, LOCKDEP_STILL_OK);
        kvm_vgic_global_state.no_hw_deactivation = true;
    }
 
    switch (gic_kvm_info->type) {
    case GIC_V2:
        ret = vgic_v2_probe(gic_kvm_info);
        break;
    case GIC_V3:
        ret = vgic_v3_probe(gic_kvm_info);
        if (!ret) {
            static_branch_enable(&kvm_vgic_global_state.gicv3_cpuif);
            kvm_info("GIC system register CPU interface enabled\n");
        }
        break;
    default:
        ret = -ENODEV;
    }
 
    kvm_vgic_global_state.maint_irq = gic_kvm_info->maint_irq;
 
    kfree(gic_kvm_info);
    gic_kvm_info = NULL;
 
    if (ret)
        return ret;
 
    if (!has_mask && !kvm_vgic_global_state.maint_irq)
        return 0;
 
    ret = request_percpu_irq(kvm_vgic_global_state.maint_irq,
                 vgic_maintenance_handler,
                 "vgic", kvm_get_running_vcpus());
    if (ret) {
        kvm_err("Cannot register interrupt %d\n",
            kvm_vgic_global_state.maint_irq);
        return ret;
    }
 
    kvm_info("vgic interrupt IRQ%d\n", kvm_vgic_global_state.maint_irq);
    return 0;
}

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kvm_vgic_init_cpu_hardware()

void kvm_vgic_init_cpu_hardware

(

void

)

kvm_vgic_init_cpu_hardware - initialize the GIC VE hardware

For a specific CPU, initialize the GIC VE hardware.

Definition at line 544 of file vgic-init.c.

{
    BUG_ON(preemptible());
 
    /*
     * We want to make sure the list registers start out clear so that we
     * only have the program the used registers.
     */
    if (kvm_vgic_global_state.type == VGIC_V2)
        vgic_v2_init_lrs();
    else
        kvm_call_hyp(__vgic_v3_init_lrs);
}

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kvm_vgic_inject_irq()

int kvm_vgic_inject_irq	(	struct kvm *	kvm,
		struct kvm_vcpu *	vcpu,
		unsigned int	intid,
		bool	level,
		void *	owner
	)

kvm_vgic_inject_irq - Inject an IRQ from a device to the vgic @kvm: The VM structure pointer @vcpu: The CPU for PPIs or NULL for global interrupts @intid: The INTID to inject a new state to. @level: Edge-triggered: true: to trigger the interrupt false: to ignore the call Level-sensitive true: raise the input signal false: lower the input signal @owner: The opaque pointer to the owner of the IRQ being raised to verify that the caller is allowed to inject this IRQ. Userspace injections will have owner == NULL.

The VGIC is not concerned with devices being active-LOW or active-HIGH for level-sensitive interrupts. You can think of the level parameter as 1 being HIGH and 0 being LOW and all devices being active-HIGH.

Definition at line 439 of file vgic.c.

{
    struct vgic_irq *irq;
    unsigned long flags;
    int ret;
 
    ret = vgic_lazy_init(kvm);
    if (ret)
        return ret;
 
    if (!vcpu && intid < VGIC_NR_PRIVATE_IRQS)
        return -EINVAL;
 
    trace_vgic_update_irq_pending(vcpu ? vcpu->vcpu_idx : 0, intid, level);
 
    irq = vgic_get_irq(kvm, vcpu, intid);
    if (!irq)
        return -EINVAL;
 
    raw_spin_lock_irqsave(&irq->irq_lock, flags);
 
    if (!vgic_validate_injection(irq, level, owner)) {
        /* Nothing to see here, move along... */
        raw_spin_unlock_irqrestore(&irq->irq_lock, flags);
        vgic_put_irq(kvm, irq);
        return 0;
    }
 
    if (irq->config == VGIC_CONFIG_LEVEL)
        irq->line_level = level;
    else
        irq->pending_latch = true;
 
    vgic_queue_irq_unlock(kvm, irq, flags);
    vgic_put_irq(kvm, irq);
 
    return 0;
}

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kvm_vgic_load()

void kvm_vgic_load

(

struct kvm_vcpu *

vcpu

)

Definition at line 938 of file vgic.c.

{
    if (unlikely(!vgic_initialized(vcpu->kvm)))
        return;
 
    if (kvm_vgic_global_state.type == VGIC_V2)
        vgic_v2_load(vcpu);
    else
        vgic_v3_load(vcpu);
}

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kvm_vgic_map_is_active()

bool kvm_vgic_map_is_active	(	struct kvm_vcpu *	vcpu,
		unsigned int	vintid
	)

Definition at line 1022 of file vgic.c.

{
    struct vgic_irq *irq;
    bool map_is_active;
    unsigned long flags;
 
    if (!vgic_initialized(vcpu->kvm))
        return false;
 
    irq = vgic_get_irq(vcpu->kvm, vcpu, vintid);
    raw_spin_lock_irqsave(&irq->irq_lock, flags);
    map_is_active = irq->hw && irq->active;
    raw_spin_unlock_irqrestore(&irq->irq_lock, flags);
    vgic_put_irq(vcpu->kvm, irq);
 
    return map_is_active;
}

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kvm_vgic_map_phys_irq()

int kvm_vgic_map_phys_irq	(	struct kvm_vcpu *	vcpu,
		unsigned int	host_irq,
		u32	vintid,
		struct irq_ops *	ops
	)

Definition at line 514 of file vgic.c.

{
    struct vgic_irq *irq = vgic_get_irq(vcpu->kvm, vcpu, vintid);
    unsigned long flags;
    int ret;
 
    BUG_ON(!irq);
 
    raw_spin_lock_irqsave(&irq->irq_lock, flags);
    ret = kvm_vgic_map_irq(vcpu, irq, host_irq, ops);
    raw_spin_unlock_irqrestore(&irq->irq_lock, flags);
    vgic_put_irq(vcpu->kvm, irq);
 
    return ret;
}

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kvm_vgic_map_resources()

int kvm_vgic_map_resources

(

struct kvm *

kvm

)

Map the MMIO regions depending on the VGIC model exposed to the guest called on the first VCPU run. Also map the virtual CPU interface into the VM. v2 calls vgic_init() if not already done. v3 and derivatives return an error if the VGIC is not initialized. vgic_ready() returns true if this function has succeeded. @kvm: kvm struct pointer

Definition at line 456 of file vgic-init.c.

{
    struct vgic_dist *dist = &kvm->arch.vgic;
    enum vgic_type type;
    gpa_t dist_base;
    int ret = 0;
 
    if (likely(vgic_ready(kvm)))
        return 0;
 
    mutex_lock(&kvm->slots_lock);
    mutex_lock(&kvm->arch.config_lock);
    if (vgic_ready(kvm))
        goto out;
 
    if (!irqchip_in_kernel(kvm))
        goto out;
 
    if (dist->vgic_model == KVM_DEV_TYPE_ARM_VGIC_V2) {
        ret = vgic_v2_map_resources(kvm);
        type = VGIC_V2;
    } else {
        ret = vgic_v3_map_resources(kvm);
        type = VGIC_V3;
    }
 
    if (ret)
        goto out;
 
    dist->ready = true;
    dist_base = dist->vgic_dist_base;
    mutex_unlock(&kvm->arch.config_lock);
 
    ret = vgic_register_dist_iodev(kvm, dist_base, type);
    if (ret)
        kvm_err("Unable to register VGIC dist MMIO regions\n");
 
    goto out_slots;
out:
    mutex_unlock(&kvm->arch.config_lock);
out_slots:
    mutex_unlock(&kvm->slots_lock);
 
    if (ret)
        kvm_vgic_destroy(kvm);
 
    return ret;
}

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kvm_vgic_put()

void kvm_vgic_put

(

struct kvm_vcpu *

vcpu

)

Definition at line 949 of file vgic.c.

{
    if (unlikely(!vgic_initialized(vcpu->kvm)))
        return;
 
    if (kvm_vgic_global_state.type == VGIC_V2)
        vgic_v2_put(vcpu);
    else
        vgic_v3_put(vcpu);
}

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kvm_vgic_reset_mapped_irq()

void kvm_vgic_reset_mapped_irq	(	struct kvm_vcpu *	vcpu,
		u32	vintid
	)

kvm_vgic_reset_mapped_irq - Reset a mapped IRQ @vcpu: The VCPU pointer @vintid: The INTID of the interrupt

Reset the active and pending states of a mapped interrupt. Kernel subsystems injecting mapped interrupts should reset their interrupt lines when we are doing a reset of the VM.

Definition at line 540 of file vgic.c.

{
    struct vgic_irq *irq = vgic_get_irq(vcpu->kvm, vcpu, vintid);
    unsigned long flags;
 
    if (!irq->hw)
        goto out;
 
    raw_spin_lock_irqsave(&irq->irq_lock, flags);
    irq->active = false;
    irq->pending_latch = false;
    irq->line_level = false;
    raw_spin_unlock_irqrestore(&irq->irq_lock, flags);
out:
    vgic_put_irq(vcpu->kvm, irq);
}

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kvm_vgic_set_owner()

int kvm_vgic_set_owner	(	struct kvm_vcpu *	vcpu,
		unsigned int	intid,
		void *	owner
	)

kvm_vgic_set_owner - Set the owner of an interrupt for a VM

@vcpu: Pointer to the VCPU (used for PPIs) @intid: The virtual INTID identifying the interrupt (PPI or SPI) @owner: Opaque pointer to the owner

Returns 0 if intid is not already used by another in-kernel device and the owner is set, otherwise returns an error code.

Definition at line 601 of file vgic.c.

{
    struct vgic_irq *irq;
    unsigned long flags;
    int ret = 0;
 
    if (!vgic_initialized(vcpu->kvm))
        return -EAGAIN;
 
    /* SGIs and LPIs cannot be wired up to any device */
    if (!irq_is_ppi(intid) && !vgic_valid_spi(vcpu->kvm, intid))
        return -EINVAL;
 
    irq = vgic_get_irq(vcpu->kvm, vcpu, intid);
    raw_spin_lock_irqsave(&irq->irq_lock, flags);
    if (irq->owner && irq->owner != owner)
        ret = -EEXIST;
    else
        irq->owner = owner;
    raw_spin_unlock_irqrestore(&irq->irq_lock, flags);
 
    return ret;
}

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kvm_vgic_setup_default_irq_routing()

int kvm_vgic_setup_default_irq_routing

(

struct kvm *

kvm

)

kvm_vgic_setup_default_irq_routing: Setup a default flat gsi routing table mapping all SPIs

Definition at line 135 of file vgic-irqfd.c.

{
    struct kvm_irq_routing_entry *entries;
    struct vgic_dist *dist = &kvm->arch.vgic;
    u32 nr = dist->nr_spis;
    int i, ret;
 
    entries = kcalloc(nr, sizeof(*entries), GFP_KERNEL_ACCOUNT);
    if (!entries)
        return -ENOMEM;
 
    for (i = 0; i < nr; i++) {
        entries[i].gsi = i;
        entries[i].type = KVM_IRQ_ROUTING_IRQCHIP;
        entries[i].u.irqchip.irqchip = 0;
        entries[i].u.irqchip.pin = i;
    }
    ret = kvm_set_irq_routing(kvm, entries, nr, 0);
    kfree(entries);
    return ret;
}

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kvm_vgic_sync_hwstate()

void kvm_vgic_sync_hwstate

(

struct kvm_vcpu *

vcpu

)

Definition at line 875 of file vgic.c.

{
    int used_lrs;
 
    /* An empty ap_list_head implies used_lrs == 0 */
    if (list_empty(&vcpu->arch.vgic_cpu.ap_list_head))
        return;
 
    if (can_access_vgic_from_kernel())
        vgic_save_state(vcpu);
 
    if (!static_branch_unlikely(&kvm_vgic_global_state.gicv3_cpuif))
        used_lrs = vcpu->arch.vgic_cpu.vgic_v2.used_lrs;
    else
        used_lrs = vcpu->arch.vgic_cpu.vgic_v3.used_lrs;
 
    if (used_lrs)
        vgic_fold_lr_state(vcpu);
    vgic_prune_ap_list(vcpu);
}

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kvm_vgic_unmap_phys_irq()

int kvm_vgic_unmap_phys_irq	(	struct kvm_vcpu *	vcpu,
		unsigned int	vintid
	)

Definition at line 557 of file vgic.c.

{
    struct vgic_irq *irq;
    unsigned long flags;
 
    if (!vgic_initialized(vcpu->kvm))
        return -EAGAIN;
 
    irq = vgic_get_irq(vcpu->kvm, vcpu, vintid);
    BUG_ON(!irq);
 
    raw_spin_lock_irqsave(&irq->irq_lock, flags);
    kvm_vgic_unmap_irq(irq);
    raw_spin_unlock_irqrestore(&irq->irq_lock, flags);
    vgic_put_irq(vcpu->kvm, irq);
 
    return 0;
}

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kvm_vgic_v4_set_forwarding()

int kvm_vgic_v4_set_forwarding	(	struct kvm *	kvm,
		int	irq,
		struct kvm_kernel_irq_routing_entry *	irq_entry
	)

Definition at line 411 of file vgic-v4.c.

{
    struct vgic_its *its;
    struct vgic_irq *irq;
    struct its_vlpi_map map;
    unsigned long flags;
    int ret;
 
    if (!vgic_supports_direct_msis(kvm))
        return 0;
 
    /*
     * Get the ITS, and escape early on error (not a valid
     * doorbell for any of our vITSs).
     */
    its = vgic_get_its(kvm, irq_entry);
    if (IS_ERR(its))
        return 0;
 
    mutex_lock(&its->its_lock);
 
    /* Perform the actual DevID/EventID -> LPI translation. */
    ret = vgic_its_resolve_lpi(kvm, its, irq_entry->msi.devid,
                   irq_entry->msi.data, &irq);
    if (ret)
        goto out;
 
    /* Silently exit if the vLPI is already mapped */
    if (irq->hw)
        goto out;
 
    /*
     * Emit the mapping request. If it fails, the ITS probably
     * isn't v4 compatible, so let's silently bail out. Holding
     * the ITS lock should ensure that nothing can modify the
     * target vcpu.
     */
    map = (struct its_vlpi_map) {
        .vm     = &kvm->arch.vgic.its_vm,
        .vpe        = &irq->target_vcpu->arch.vgic_cpu.vgic_v3.its_vpe,
        .vintid     = irq->intid,
        .properties = ((irq->priority & 0xfc) |
                   (irq->enabled ? LPI_PROP_ENABLED : 0) |
                   LPI_PROP_GROUP1),
        .db_enabled = true,
    };
 
    ret = its_map_vlpi(virq, &map);
    if (ret)
        goto out;
 
    irq->hw     = true;
    irq->host_irq   = virq;
    atomic_inc(&map.vpe->vlpi_count);
 
    /* Transfer pending state */
    raw_spin_lock_irqsave(&irq->irq_lock, flags);
    if (irq->pending_latch) {
        ret = irq_set_irqchip_state(irq->host_irq,
                        IRQCHIP_STATE_PENDING,
                        irq->pending_latch);
        WARN_RATELIMIT(ret, "IRQ %d", irq->host_irq);
 
        /*
         * Clear pending_latch and communicate this state
         * change via vgic_queue_irq_unlock.
         */
        irq->pending_latch = false;
        vgic_queue_irq_unlock(kvm, irq, flags);
    } else {
        raw_spin_unlock_irqrestore(&irq->irq_lock, flags);
    }
 
out:
    mutex_unlock(&its->its_lock);
    return ret;
}

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kvm_vgic_v4_unset_forwarding()

int kvm_vgic_v4_unset_forwarding	(	struct kvm *	kvm,
		int	irq,
		struct kvm_kernel_irq_routing_entry *	irq_entry
	)

Definition at line 490 of file vgic-v4.c.

{
    struct vgic_its *its;
    struct vgic_irq *irq;
    int ret;
 
    if (!vgic_supports_direct_msis(kvm))
        return 0;
 
    /*
     * Get the ITS, and escape early on error (not a valid
     * doorbell for any of our vITSs).
     */
    its = vgic_get_its(kvm, irq_entry);
    if (IS_ERR(its))
        return 0;
 
    mutex_lock(&its->its_lock);
 
    ret = vgic_its_resolve_lpi(kvm, its, irq_entry->msi.devid,
                   irq_entry->msi.data, &irq);
    if (ret)
        goto out;
 
    WARN_ON(!(irq->hw && irq->host_irq == virq));
    if (irq->hw) {
        atomic_dec(&irq->target_vcpu->arch.vgic_cpu.vgic_v3.its_vpe.vlpi_count);
        irq->hw = false;
        ret = its_unmap_vlpi(virq);
    }
 
out:
    mutex_unlock(&its->its_lock);
    return ret;
}

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kvm_vgic_vcpu_destroy()

void kvm_vgic_vcpu_destroy

(

struct kvm_vcpu *

vcpu

)

Definition at line 388 of file vgic-init.c.

{
    struct kvm *kvm = vcpu->kvm;
 
    mutex_lock(&kvm->slots_lock);
    __kvm_vgic_vcpu_destroy(vcpu);
    mutex_unlock(&kvm->slots_lock);
}

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kvm_vgic_vcpu_init()

int kvm_vgic_vcpu_init

(

struct kvm_vcpu *

vcpu

)

kvm_vgic_vcpu_init() - Initialize static VGIC VCPU data structures and register VCPU-specific KVM iodevs

@vcpu: pointer to the VCPU being created and initialized

Only do initialization, but do not actually enable the VGIC CPU interface

Definition at line 194 of file vgic-init.c.

{
    struct vgic_cpu *vgic_cpu = &vcpu->arch.vgic_cpu;
    struct vgic_dist *dist = &vcpu->kvm->arch.vgic;
    int ret = 0;
    int i;
 
    vgic_cpu->rd_iodev.base_addr = VGIC_ADDR_UNDEF;
 
    INIT_LIST_HEAD(&vgic_cpu->ap_list_head);
    raw_spin_lock_init(&vgic_cpu->ap_list_lock);
    atomic_set(&vgic_cpu->vgic_v3.its_vpe.vlpi_count, 0);
 
    /*
     * Enable and configure all SGIs to be edge-triggered and
     * configure all PPIs as level-triggered.
     */
    for (i = 0; i < VGIC_NR_PRIVATE_IRQS; i++) {
        struct vgic_irq *irq = &vgic_cpu->private_irqs[i];
 
        INIT_LIST_HEAD(&irq->ap_list);
        raw_spin_lock_init(&irq->irq_lock);
        irq->intid = i;
        irq->vcpu = NULL;
        irq->target_vcpu = vcpu;
        kref_init(&irq->refcount);
        if (vgic_irq_is_sgi(i)) {
            /* SGIs */
            irq->enabled = 1;
            irq->config = VGIC_CONFIG_EDGE;
        } else {
            /* PPIs */
            irq->config = VGIC_CONFIG_LEVEL;
        }
    }
 
    if (!irqchip_in_kernel(vcpu->kvm))
        return 0;
 
    /*
     * If we are creating a VCPU with a GICv3 we must also register the
     * KVM io device for the redistributor that belongs to this VCPU.
     */
    if (dist->vgic_model == KVM_DEV_TYPE_ARM_VGIC_V3) {
        mutex_lock(&vcpu->kvm->slots_lock);
        ret = vgic_register_redist_iodev(vcpu);
        mutex_unlock(&vcpu->kvm->slots_lock);
    }
    return ret;
}

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kvm_vgic_vcpu_pending_irq()

int kvm_vgic_vcpu_pending_irq

(

struct kvm_vcpu *

vcpu

)

Definition at line 971 of file vgic.c.

{
    struct vgic_cpu *vgic_cpu = &vcpu->arch.vgic_cpu;
    struct vgic_irq *irq;
    bool pending = false;
    unsigned long flags;
    struct vgic_vmcr vmcr;
 
    if (!vcpu->kvm->arch.vgic.enabled)
        return false;
 
    if (vcpu->arch.vgic_cpu.vgic_v3.its_vpe.pending_last)
        return true;
 
    vgic_get_vmcr(vcpu, &vmcr);
 
    raw_spin_lock_irqsave(&vgic_cpu->ap_list_lock, flags);
 
    list_for_each_entry(irq, &vgic_cpu->ap_list_head, ap_list) {
        raw_spin_lock(&irq->irq_lock);
        pending = irq_is_pending(irq) && irq->enabled &&
              !irq->active &&
              irq->priority < vmcr.pmr;
        raw_spin_unlock(&irq->irq_lock);
 
        if (pending)
            break;
    }
 
    raw_spin_unlock_irqrestore(&vgic_cpu->ap_list_lock, flags);
 
    return pending;
}

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kvm_vgic_vmcr_sync()

void kvm_vgic_vmcr_sync

(

struct kvm_vcpu *

vcpu

)

Definition at line 960 of file vgic.c.

{
    if (unlikely(!irqchip_in_kernel(vcpu->kvm)))
        return;
 
    if (kvm_vgic_global_state.type == VGIC_V2)
        vgic_v2_vmcr_sync(vcpu);
    else
        vgic_v3_vmcr_sync(vcpu);
}

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vgic_irq_needs_resampling()

static bool vgic_irq_needs_resampling ( struct vgic_irq *  irq )

inlinestatic

Definition at line 160 of file arm_vgic.h.

{
    return irq->ops && (irq->ops->flags & VGIC_IRQ_SW_RESAMPLE);
}

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vgic_v3_dispatch_sgi()

void vgic_v3_dispatch_sgi	(	struct kvm_vcpu *	vcpu,
		u64	reg,
		bool	allow_group1
	)

vgic_v3_dispatch_sgi - handle SGI requests from VCPUs @vcpu: The VCPU requesting a SGI @reg: The value written into ICC_{ASGI1,SGI0,SGI1}R by that VCPU @allow_group1: Does the sysreg access allow generation of G1 SGIs

With GICv3 (and ARE=1) CPUs trigger SGIs by writing to a system register. This will trap in sys_regs.c and call this function. This ICC_SGI1R_EL1 register contains the upper three affinity levels of the target processors as well as a bitmask of 16 Aff0 CPUs.

If the interrupt routing mode bit is not set, we iterate over the Aff0 bits and signal the VCPUs matching the provided Aff{3,2,1}.

If this bit is set, we signal all, but not the calling VCPU.

Definition at line 1058 of file vgic-mmio-v3.c.

{
    struct kvm *kvm = vcpu->kvm;
    struct kvm_vcpu *c_vcpu;
    unsigned long target_cpus;
    u64 mpidr;
    u32 sgi, aff0;
    unsigned long c;
 
    sgi = FIELD_GET(ICC_SGI1R_SGI_ID_MASK, reg);
 
    /* Broadcast */
    if (unlikely(reg & BIT_ULL(ICC_SGI1R_IRQ_ROUTING_MODE_BIT))) {
        kvm_for_each_vcpu(c, c_vcpu, kvm) {
            /* Don't signal the calling VCPU */
            if (c_vcpu == vcpu)
                continue;
 
            vgic_v3_queue_sgi(c_vcpu, sgi, allow_group1);
        }
 
        return;
    }
 
    /* We iterate over affinities to find the corresponding vcpus */
    mpidr = SGI_AFFINITY_LEVEL(reg, 3);
    mpidr |= SGI_AFFINITY_LEVEL(reg, 2);
    mpidr |= SGI_AFFINITY_LEVEL(reg, 1);
    target_cpus = FIELD_GET(ICC_SGI1R_TARGET_LIST_MASK, reg);
 
    for_each_set_bit(aff0, &target_cpus, hweight_long(ICC_SGI1R_TARGET_LIST_MASK)) {
        c_vcpu = kvm_mpidr_to_vcpu(kvm, mpidr | aff0);
        if (c_vcpu)
            vgic_v3_queue_sgi(c_vcpu, sgi, allow_group1);
    }
}

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vgic_v4_commit()

void vgic_v4_commit

(

struct kvm_vcpu *

vcpu

)

Definition at line 385 of file vgic-v4.c.

{
    struct its_vpe *vpe = &vcpu->arch.vgic_cpu.vgic_v3.its_vpe;
 
    /*
     * No need to wait for the vPE to be ready across a shallow guest
     * exit, as only a vcpu_put will invalidate it.
     */
    if (!vpe->ready)
        its_commit_vpe(vpe);
}

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vgic_v4_load()

int vgic_v4_load

(

struct kvm_vcpu *

vcpu

)

Definition at line 349 of file vgic-v4.c.

{
    struct its_vpe *vpe = &vcpu->arch.vgic_cpu.vgic_v3.its_vpe;
    int err;
 
    if (!vgic_supports_direct_msis(vcpu->kvm) || vpe->resident)
        return 0;
 
    if (vcpu_get_flag(vcpu, IN_WFI))
        return 0;
 
    /*
     * Before making the VPE resident, make sure the redistributor
     * corresponding to our current CPU expects us here. See the
     * doc in drivers/irqchip/irq-gic-v4.c to understand how this
     * turns into a VMOVP command at the ITS level.
     */
    err = irq_set_affinity(vpe->irq, cpumask_of(smp_processor_id()));
    if (err)
        return err;
 
    err = its_make_vpe_resident(vpe, false, vcpu->kvm->arch.vgic.enabled);
    if (err)
        return err;
 
    /*
     * Now that the VPE is resident, let's get rid of a potential
     * doorbell interrupt that would still be pending. This is a
     * GICv4.0 only "feature"...
     */
    if (!kvm_vgic_global_state.has_gicv4_1)
        err = irq_set_irqchip_state(vpe->irq, IRQCHIP_STATE_PENDING, false);
 
    return err;
}

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vgic_v4_put()

int vgic_v4_put

(

struct kvm_vcpu *

vcpu

)

Definition at line 339 of file vgic-v4.c.

{
    struct its_vpe *vpe = &vcpu->arch.vgic_cpu.vgic_v3.its_vpe;
 
    if (!vgic_supports_direct_msis(vcpu->kvm) || !vpe->resident)
        return 0;
 
    return its_make_vpe_non_resident(vpe, !!vcpu_get_flag(vcpu, IN_WFI));
}

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Variable Documentation

kvm_vgic_global_state

struct vgic_global kvm_vgic_global_state

extern

vgic_v2_cpuif_trap

struct static_key_false vgic_v2_cpuif_trap

extern

vgic_v3_cpuif_trap

struct static_key_false vgic_v3_cpuif_trap

extern