pmu.h File Reference

#include <linux/nospec.h>

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Classes
struct	kvm_pmu_ops

Macros
#define	vcpu_to_pmu(vcpu)   (&(vcpu)->arch.pmu)
#define	pmu_to_vcpu(pmu)   (container_of((pmu), struct kvm_vcpu, arch.pmu))
#define	pmc_to_pmu(pmc)   (&(pmc)->vcpu->arch.pmu)
#define	MSR_IA32_MISC_ENABLE_PMU_RO_MASK
#define	fixed_ctrl_field(ctrl_reg, idx)   (((ctrl_reg) >> ((idx)*4)) & 0xf)
#define	VMWARE_BACKDOOR_PMC_HOST_TSC   0x10000
#define	VMWARE_BACKDOOR_PMC_REAL_TIME   0x10001
#define	VMWARE_BACKDOOR_PMC_APPARENT_TIME   0x10002

Functions
void	kvm_pmu_ops_update (const struct kvm_pmu_ops *pmu_ops)
static bool	kvm_pmu_has_perf_global_ctrl (struct kvm_pmu *pmu)
static u64	pmc_bitmask (struct kvm_pmc *pmc)
static u64	pmc_read_counter (struct kvm_pmc *pmc)
void	pmc_write_counter (struct kvm_pmc *pmc, u64 val)
static bool	pmc_is_gp (struct kvm_pmc *pmc)
static bool	pmc_is_fixed (struct kvm_pmc *pmc)
static bool	kvm_valid_perf_global_ctrl (struct kvm_pmu *pmu, u64 data)
static struct kvm_pmc *	get_gp_pmc (struct kvm_pmu *pmu, u32 msr, u32 base)
static struct kvm_pmc *	get_fixed_pmc (struct kvm_pmu *pmu, u32 msr)
static bool	pmc_speculative_in_use (struct kvm_pmc *pmc)
static void	kvm_init_pmu_capability (const struct kvm_pmu_ops *pmu_ops)
static void	kvm_pmu_request_counter_reprogram (struct kvm_pmc *pmc)
static void	reprogram_counters (struct kvm_pmu *pmu, u64 diff)
static bool	pmc_is_globally_enabled (struct kvm_pmc *pmc)
void	kvm_pmu_deliver_pmi (struct kvm_vcpu *vcpu)
void	kvm_pmu_handle_event (struct kvm_vcpu *vcpu)
int	kvm_pmu_rdpmc (struct kvm_vcpu *vcpu, unsigned pmc, u64 *data)
bool	kvm_pmu_is_valid_rdpmc_ecx (struct kvm_vcpu *vcpu, unsigned int idx)
bool	kvm_pmu_is_valid_msr (struct kvm_vcpu *vcpu, u32 msr)
int	kvm_pmu_get_msr (struct kvm_vcpu *vcpu, struct msr_data *msr_info)
int	kvm_pmu_set_msr (struct kvm_vcpu *vcpu, struct msr_data *msr_info)
void	kvm_pmu_refresh (struct kvm_vcpu *vcpu)
void	kvm_pmu_init (struct kvm_vcpu *vcpu)
void	kvm_pmu_cleanup (struct kvm_vcpu *vcpu)
void	kvm_pmu_destroy (struct kvm_vcpu *vcpu)
int	kvm_vm_ioctl_set_pmu_event_filter (struct kvm *kvm, void __user *argp)
void	kvm_pmu_trigger_event (struct kvm_vcpu *vcpu, u64 perf_hw_id)
bool	is_vmware_backdoor_pmc (u32 pmc_idx)

Variables
struct x86_pmu_capability	kvm_pmu_cap
struct kvm_pmu_ops	intel_pmu_ops
struct kvm_pmu_ops	amd_pmu_ops

Macro Definition Documentation

fixed_ctrl_field

#define fixed_ctrl_field	(		ctrl_reg,
			idx
	)		(((ctrl_reg) >> ((idx)*4)) & 0xf)

Definition at line 15 of file pmu.h.

MSR_IA32_MISC_ENABLE_PMU_RO_MASK

#define MSR_IA32_MISC_ENABLE_PMU_RO_MASK

Value:

                      (MSR_IA32_MISC_ENABLE_PEBS_UNAVAIL |  \
                      MSR_IA32_MISC_ENABLE_BTS_UNAVAIL)

Definition at line 11 of file pmu.h.

pmc_to_pmu

#define pmc_to_pmu

(

pmc

)

(&(pmc)->vcpu->arch.pmu)

Definition at line 9 of file pmu.h.

pmu_to_vcpu

#define pmu_to_vcpu

(

pmu

)

(container_of((pmu), struct kvm_vcpu, arch.pmu))

Definition at line 8 of file pmu.h.

vcpu_to_pmu

#define vcpu_to_pmu

(

vcpu

)

(&(vcpu)->arch.pmu)

Definition at line 7 of file pmu.h.

VMWARE_BACKDOOR_PMC_APPARENT_TIME

#define VMWARE_BACKDOOR_PMC_APPARENT_TIME   0x10002

Definition at line 19 of file pmu.h.

VMWARE_BACKDOOR_PMC_HOST_TSC

#define VMWARE_BACKDOOR_PMC_HOST_TSC   0x10000

Definition at line 17 of file pmu.h.

VMWARE_BACKDOOR_PMC_REAL_TIME

#define VMWARE_BACKDOOR_PMC_REAL_TIME   0x10001

Definition at line 18 of file pmu.h.

Function Documentation

get_fixed_pmc()

static struct kvm_pmc* get_fixed_pmc ( struct kvm_pmu *  pmu, u32  msr  )

inlinestatic

Definition at line 114 of file pmu.h.

{
    int base = MSR_CORE_PERF_FIXED_CTR0;
 
    if (msr >= base && msr < base + pmu->nr_arch_fixed_counters) {
        u32 index = array_index_nospec(msr - base,
                           pmu->nr_arch_fixed_counters);
 
        return &pmu->fixed_counters[index];
    }
 
    return NULL;
}

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get_gp_pmc()

static struct kvm_pmc* get_gp_pmc ( struct kvm_pmu *  pmu, u32  msr, u32  base  )

inlinestatic

Definition at line 100 of file pmu.h.

{
    if (msr >= base && msr < base + pmu->nr_arch_gp_counters) {
        u32 index = array_index_nospec(msr - base,
                           pmu->nr_arch_gp_counters);
 
        return &pmu->gp_counters[index];
    }
 
    return NULL;
}

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is_vmware_backdoor_pmc()

bool is_vmware_backdoor_pmc

(

u32

pmc_idx

)

Definition at line 534 of file pmu.c.

{
    switch (pmc_idx) {
    case VMWARE_BACKDOOR_PMC_HOST_TSC:
    case VMWARE_BACKDOOR_PMC_REAL_TIME:
    case VMWARE_BACKDOOR_PMC_APPARENT_TIME:
        return true;
    }
    return false;
}

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kvm_init_pmu_capability()

static void kvm_init_pmu_capability ( const struct kvm_pmu_ops *  pmu_ops )

inlinestatic

Definition at line 141 of file pmu.h.

{
    bool is_intel = boot_cpu_data.x86_vendor == X86_VENDOR_INTEL;
    int min_nr_gp_ctrs = pmu_ops->MIN_NR_GP_COUNTERS;
 
    /*
     * Hybrid PMUs don't play nice with virtualization without careful
     * configuration by userspace, and KVM's APIs for reporting supported
     * vPMU features do not account for hybrid PMUs.  Disable vPMU support
     * for hybrid PMUs until KVM gains a way to let userspace opt-in.
     */
    if (cpu_feature_enabled(X86_FEATURE_HYBRID_CPU))
        enable_pmu = false;
 
    if (enable_pmu) {
        perf_get_x86_pmu_capability(&kvm_pmu_cap);
 
        /*
         * WARN if perf did NOT disable hardware PMU if the number of
         * architecturally required GP counters aren't present, i.e. if
         * there are a non-zero number of counters, but fewer than what
         * is architecturally required.
         */
        if (!kvm_pmu_cap.num_counters_gp ||
            WARN_ON_ONCE(kvm_pmu_cap.num_counters_gp < min_nr_gp_ctrs))
            enable_pmu = false;
        else if (is_intel && !kvm_pmu_cap.version)
            enable_pmu = false;
    }
 
    if (!enable_pmu) {
        memset(&kvm_pmu_cap, 0, sizeof(kvm_pmu_cap));
        return;
    }
 
    kvm_pmu_cap.version = min(kvm_pmu_cap.version, 2);
    kvm_pmu_cap.num_counters_gp = min(kvm_pmu_cap.num_counters_gp,
                      pmu_ops->MAX_NR_GP_COUNTERS);
    kvm_pmu_cap.num_counters_fixed = min(kvm_pmu_cap.num_counters_fixed,
                         KVM_PMC_MAX_FIXED);
}

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kvm_pmu_cleanup()

void kvm_pmu_cleanup

(

struct kvm_vcpu *

vcpu

)

Definition at line 767 of file pmu.c.

{
    struct kvm_pmu *pmu = vcpu_to_pmu(vcpu);
    struct kvm_pmc *pmc = NULL;
    DECLARE_BITMAP(bitmask, X86_PMC_IDX_MAX);
    int i;
 
    pmu->need_cleanup = false;
 
    bitmap_andnot(bitmask, pmu->all_valid_pmc_idx,
              pmu->pmc_in_use, X86_PMC_IDX_MAX);
 
    for_each_set_bit(i, bitmask, X86_PMC_IDX_MAX) {
        pmc = static_call(kvm_x86_pmu_pmc_idx_to_pmc)(pmu, i);
 
        if (pmc && pmc->perf_event && !pmc_speculative_in_use(pmc))
            pmc_stop_counter(pmc);
    }
 
    static_call_cond(kvm_x86_pmu_cleanup)(vcpu);
 
    bitmap_zero(pmu->pmc_in_use, X86_PMC_IDX_MAX);
}

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kvm_pmu_deliver_pmi()

void kvm_pmu_deliver_pmi

(

struct kvm_vcpu *

vcpu

)

Definition at line 594 of file pmu.c.

{
    if (lapic_in_kernel(vcpu)) {
        static_call_cond(kvm_x86_pmu_deliver_pmi)(vcpu);
        kvm_apic_local_deliver(vcpu->arch.apic, APIC_LVTPC);
    }
}

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kvm_pmu_destroy()

void kvm_pmu_destroy

(

struct kvm_vcpu *

vcpu

)

Definition at line 791 of file pmu.c.

{
    kvm_pmu_reset(vcpu);
}

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kvm_pmu_get_msr()

int kvm_pmu_get_msr	(	struct kvm_vcpu *	vcpu,
		struct msr_data *	msr_info
	)

Definition at line 625 of file pmu.c.

{
    struct kvm_pmu *pmu = vcpu_to_pmu(vcpu);
    u32 msr = msr_info->index;
 
    switch (msr) {
    case MSR_CORE_PERF_GLOBAL_STATUS:
    case MSR_AMD64_PERF_CNTR_GLOBAL_STATUS:
        msr_info->data = pmu->global_status;
        break;
    case MSR_AMD64_PERF_CNTR_GLOBAL_CTL:
    case MSR_CORE_PERF_GLOBAL_CTRL:
        msr_info->data = pmu->global_ctrl;
        break;
    case MSR_AMD64_PERF_CNTR_GLOBAL_STATUS_CLR:
    case MSR_CORE_PERF_GLOBAL_OVF_CTRL:
        msr_info->data = 0;
        break;
    default:
        return static_call(kvm_x86_pmu_get_msr)(vcpu, msr_info);
    }
 
    return 0;
}

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kvm_pmu_handle_event()

void kvm_pmu_handle_event

(

struct kvm_vcpu *

vcpu

)

Definition at line 503 of file pmu.c.

{
    struct kvm_pmu *pmu = vcpu_to_pmu(vcpu);
    int bit;
 
    for_each_set_bit(bit, pmu->reprogram_pmi, X86_PMC_IDX_MAX) {
        struct kvm_pmc *pmc = static_call(kvm_x86_pmu_pmc_idx_to_pmc)(pmu, bit);
 
        if (unlikely(!pmc)) {
            clear_bit(bit, pmu->reprogram_pmi);
            continue;
        }
 
        reprogram_counter(pmc);
    }
 
    /*
     * Unused perf_events are only released if the corresponding MSRs
     * weren't accessed during the last vCPU time slice. kvm_arch_sched_in
     * triggers KVM_REQ_PMU if cleanup is needed.
     */
    if (unlikely(pmu->need_cleanup))
        kvm_pmu_cleanup(vcpu);
}

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kvm_pmu_has_perf_global_ctrl()

static bool kvm_pmu_has_perf_global_ctrl ( struct kvm_pmu *  pmu )

inlinestatic

Definition at line 44 of file pmu.h.

{
    /*
     * Architecturally, Intel's SDM states that IA32_PERF_GLOBAL_CTRL is
     * supported if "CPUID.0AH: EAX[7:0] > 0", i.e. if the PMU version is
     * greater than zero.  However, KVM only exposes and emulates the MSR
     * to/for the guest if the guest PMU supports at least "Architectural
     * Performance Monitoring Version 2".
     *
     * AMD's version of PERF_GLOBAL_CTRL conveniently shows up with v2.
     */
    return pmu->version > 1;
}

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kvm_pmu_init()

void kvm_pmu_init

(

struct kvm_vcpu *

vcpu

)

Definition at line 757 of file pmu.c.

{
    struct kvm_pmu *pmu = vcpu_to_pmu(vcpu);
 
    memset(pmu, 0, sizeof(*pmu));
    static_call(kvm_x86_pmu_init)(vcpu);
    kvm_pmu_refresh(vcpu);
}

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kvm_pmu_is_valid_msr()

bool kvm_pmu_is_valid_msr	(	struct kvm_vcpu *	vcpu,
		u32	msr
	)

Definition at line 602 of file pmu.c.

{
    switch (msr) {
    case MSR_CORE_PERF_GLOBAL_STATUS:
    case MSR_CORE_PERF_GLOBAL_CTRL:
    case MSR_CORE_PERF_GLOBAL_OVF_CTRL:
        return kvm_pmu_has_perf_global_ctrl(vcpu_to_pmu(vcpu));
    default:
        break;
    }
    return static_call(kvm_x86_pmu_msr_idx_to_pmc)(vcpu, msr) ||
        static_call(kvm_x86_pmu_is_valid_msr)(vcpu, msr);
}

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kvm_pmu_is_valid_rdpmc_ecx()

bool kvm_pmu_is_valid_rdpmc_ecx	(	struct kvm_vcpu *	vcpu,
		unsigned int	idx
	)

Definition at line 529 of file pmu.c.

{
    return static_call(kvm_x86_pmu_is_valid_rdpmc_ecx)(vcpu, idx);
}

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kvm_pmu_ops_update()

void kvm_pmu_ops_update

(

const struct kvm_pmu_ops *

pmu_ops

)

Definition at line 83 of file pmu.c.

{
    memcpy(&kvm_pmu_ops, pmu_ops, sizeof(kvm_pmu_ops));
 
#define __KVM_X86_PMU_OP(func) \
    static_call_update(kvm_x86_pmu_##func, kvm_pmu_ops.func);
#define KVM_X86_PMU_OP(func) \
    WARN_ON(!kvm_pmu_ops.func); __KVM_X86_PMU_OP(func)
#define KVM_X86_PMU_OP_OPTIONAL __KVM_X86_PMU_OP
#include <asm/kvm-x86-pmu-ops.h>
#undef __KVM_X86_PMU_OP
}

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kvm_pmu_rdpmc()

int kvm_pmu_rdpmc	(	struct kvm_vcpu *	vcpu,
		unsigned	pmc,
		u64 *	data
	)

Definition at line 568 of file pmu.c.

{
    bool fast_mode = idx & (1u << 31);
    struct kvm_pmu *pmu = vcpu_to_pmu(vcpu);
    struct kvm_pmc *pmc;
    u64 mask = fast_mode ? ~0u : ~0ull;
 
    if (!pmu->version)
        return 1;
 
    if (is_vmware_backdoor_pmc(idx))
        return kvm_pmu_rdpmc_vmware(vcpu, idx, data);
 
    pmc = static_call(kvm_x86_pmu_rdpmc_ecx_to_pmc)(vcpu, idx, &mask);
    if (!pmc)
        return 1;
 
    if (!kvm_is_cr4_bit_set(vcpu, X86_CR4_PCE) &&
        (static_call(kvm_x86_get_cpl)(vcpu) != 0) &&
        kvm_is_cr0_bit_set(vcpu, X86_CR0_PE))
        return 1;
 
    *data = pmc_read_counter(pmc) & mask;
    return 0;
}

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kvm_pmu_refresh()

void kvm_pmu_refresh

(

struct kvm_vcpu *

vcpu

)

Definition at line 742 of file pmu.c.

{
    if (KVM_BUG_ON(kvm_vcpu_has_run(vcpu), vcpu->kvm))
        return;
 
    /*
     * Stop/release all existing counters/events before realizing the new
     * vPMU model.
     */
    kvm_pmu_reset(vcpu);
 
    bitmap_zero(vcpu_to_pmu(vcpu)->all_valid_pmc_idx, X86_PMC_IDX_MAX);
    static_call(kvm_x86_pmu_refresh)(vcpu);
}

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kvm_pmu_request_counter_reprogram()

static void kvm_pmu_request_counter_reprogram ( struct kvm_pmc *  pmc )

inlinestatic

Definition at line 183 of file pmu.h.

{
    set_bit(pmc->idx, pmc_to_pmu(pmc)->reprogram_pmi);
    kvm_make_request(KVM_REQ_PMU, pmc->vcpu);
}

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kvm_pmu_set_msr()

int kvm_pmu_set_msr	(	struct kvm_vcpu *	vcpu,
		struct msr_data *	msr_info
	)

Definition at line 650 of file pmu.c.

{
    struct kvm_pmu *pmu = vcpu_to_pmu(vcpu);
    u32 msr = msr_info->index;
    u64 data = msr_info->data;
    u64 diff;
 
    /*
     * Note, AMD ignores writes to reserved bits and read-only PMU MSRs,
     * whereas Intel generates #GP on attempts to write reserved/RO MSRs.
     */
    switch (msr) {
    case MSR_CORE_PERF_GLOBAL_STATUS:
        if (!msr_info->host_initiated)
            return 1; /* RO MSR */
        fallthrough;
    case MSR_AMD64_PERF_CNTR_GLOBAL_STATUS:
        /* Per PPR, Read-only MSR. Writes are ignored. */
        if (!msr_info->host_initiated)
            break;
 
        if (data & pmu->global_status_mask)
            return 1;
 
        pmu->global_status = data;
        break;
    case MSR_AMD64_PERF_CNTR_GLOBAL_CTL:
        data &= ~pmu->global_ctrl_mask;
        fallthrough;
    case MSR_CORE_PERF_GLOBAL_CTRL:
        if (!kvm_valid_perf_global_ctrl(pmu, data))
            return 1;
 
        if (pmu->global_ctrl != data) {
            diff = pmu->global_ctrl ^ data;
            pmu->global_ctrl = data;
            reprogram_counters(pmu, diff);
        }
        break;
    case MSR_CORE_PERF_GLOBAL_OVF_CTRL:
        /*
         * GLOBAL_OVF_CTRL, a.k.a. GLOBAL STATUS_RESET, clears bits in
         * GLOBAL_STATUS, and so the set of reserved bits is the same.
         */
        if (data & pmu->global_status_mask)
            return 1;
        fallthrough;
    case MSR_AMD64_PERF_CNTR_GLOBAL_STATUS_CLR:
        if (!msr_info->host_initiated)
            pmu->global_status &= ~data;
        break;
    default:
        kvm_pmu_mark_pmc_in_use(vcpu, msr_info->index);
        return static_call(kvm_x86_pmu_set_msr)(vcpu, msr_info);
    }
 
    return 0;
}

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kvm_pmu_trigger_event()

void kvm_pmu_trigger_event	(	struct kvm_vcpu *	vcpu,
		u64	perf_hw_id
	)

Definition at line 828 of file pmu.c.

{
    struct kvm_pmu *pmu = vcpu_to_pmu(vcpu);
    struct kvm_pmc *pmc;
    int i;
 
    for_each_set_bit(i, pmu->all_valid_pmc_idx, X86_PMC_IDX_MAX) {
        pmc = static_call(kvm_x86_pmu_pmc_idx_to_pmc)(pmu, i);
 
        if (!pmc || !pmc_event_is_allowed(pmc))
            continue;
 
        /* Ignore checks for edge detect, pin control, invert and CMASK bits */
        if (eventsel_match_perf_hw_id(pmc, perf_hw_id) && cpl_is_matched(pmc))
            kvm_pmu_incr_counter(pmc);
    }
}

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kvm_valid_perf_global_ctrl()

static bool kvm_valid_perf_global_ctrl ( struct kvm_pmu *  pmu, u64  data  )

inlinestatic

Definition at line 90 of file pmu.h.

{
    return !(pmu->global_ctrl_mask & data);
}

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kvm_vm_ioctl_set_pmu_event_filter()

int kvm_vm_ioctl_set_pmu_event_filter	(	struct kvm *	kvm,
		void __user *	argp
	)

Definition at line 928 of file pmu.c.

{
    struct kvm_pmu_event_filter __user *user_filter = argp;
    struct kvm_x86_pmu_event_filter *filter;
    struct kvm_pmu_event_filter tmp;
    struct kvm_vcpu *vcpu;
    unsigned long i;
    size_t size;
    int r;
 
    if (copy_from_user(&tmp, user_filter, sizeof(tmp)))
        return -EFAULT;
 
    if (tmp.action != KVM_PMU_EVENT_ALLOW &&
        tmp.action != KVM_PMU_EVENT_DENY)
        return -EINVAL;
 
    if (tmp.flags & ~KVM_PMU_EVENT_FLAGS_VALID_MASK)
        return -EINVAL;
 
    if (tmp.nevents > KVM_PMU_EVENT_FILTER_MAX_EVENTS)
        return -E2BIG;
 
    size = struct_size(filter, events, tmp.nevents);
    filter = kzalloc(size, GFP_KERNEL_ACCOUNT);
    if (!filter)
        return -ENOMEM;
 
    filter->action = tmp.action;
    filter->nevents = tmp.nevents;
    filter->fixed_counter_bitmap = tmp.fixed_counter_bitmap;
    filter->flags = tmp.flags;
 
    r = -EFAULT;
    if (copy_from_user(filter->events, user_filter->events,
               sizeof(filter->events[0]) * filter->nevents))
        goto cleanup;
 
    r = prepare_filter_lists(filter);
    if (r)
        goto cleanup;
 
    mutex_lock(&kvm->lock);
    filter = rcu_replace_pointer(kvm->arch.pmu_event_filter, filter,
                     mutex_is_locked(&kvm->lock));
    mutex_unlock(&kvm->lock);
    synchronize_srcu_expedited(&kvm->srcu);
 
    BUILD_BUG_ON(sizeof(((struct kvm_pmu *)0)->reprogram_pmi) >
             sizeof(((struct kvm_pmu *)0)->__reprogram_pmi));
 
    kvm_for_each_vcpu(i, vcpu, kvm)
        atomic64_set(&vcpu_to_pmu(vcpu)->__reprogram_pmi, -1ull);
 
    kvm_make_all_cpus_request(kvm, KVM_REQ_PMU);
 
    r = 0;
cleanup:
    kfree(filter);
    return r;
}

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pmc_bitmask()

static u64 pmc_bitmask ( struct kvm_pmc *  pmc )

inlinestatic

Definition at line 58 of file pmu.h.

{
    struct kvm_pmu *pmu = pmc_to_pmu(pmc);
 
    return pmu->counter_bitmask[pmc->type];
}

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pmc_is_fixed()

static bool pmc_is_fixed ( struct kvm_pmc *  pmc )

inlinestatic

Definition at line 85 of file pmu.h.

{
    return pmc->type == KVM_PMC_FIXED;
}

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pmc_is_globally_enabled()

static bool pmc_is_globally_enabled ( struct kvm_pmc *  pmc )

inlinestatic

Definition at line 206 of file pmu.h.

{
    struct kvm_pmu *pmu = pmc_to_pmu(pmc);
 
    if (!kvm_pmu_has_perf_global_ctrl(pmu))
        return true;
 
    return test_bit(pmc->idx, (unsigned long *)&pmu->global_ctrl);
}

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pmc_is_gp()

static bool pmc_is_gp ( struct kvm_pmc *  pmc )

inlinestatic

Definition at line 80 of file pmu.h.

{
    return pmc->type == KVM_PMC_GP;
}

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pmc_read_counter()

static u64 pmc_read_counter ( struct kvm_pmc *  pmc )

inlinestatic

Definition at line 65 of file pmu.h.

{
    u64 counter, enabled, running;
 
    counter = pmc->counter + pmc->emulated_counter;
 
    if (pmc->perf_event && !pmc->is_paused)
        counter += perf_event_read_value(pmc->perf_event,
                         &enabled, &running);
    /* FIXME: Scaling needed? */
    return counter & pmc_bitmask(pmc);
}

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pmc_speculative_in_use()

static bool pmc_speculative_in_use ( struct kvm_pmc *  pmc )

inlinestatic

Definition at line 128 of file pmu.h.

{
    struct kvm_pmu *pmu = pmc_to_pmu(pmc);
 
    if (pmc_is_fixed(pmc))
        return fixed_ctrl_field(pmu->fixed_ctr_ctrl,
                    pmc->idx - INTEL_PMC_IDX_FIXED) & 0x3;
 
    return pmc->eventsel & ARCH_PERFMON_EVENTSEL_ENABLE;
}

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pmc_write_counter()

void pmc_write_counter	(	struct kvm_pmc *	pmc,
		u64	val
	)

Definition at line 303 of file pmu.c.

{
    /*
     * Drop any unconsumed accumulated counts, the WRMSR is a write, not a
     * read-modify-write.  Adjust the counter value so that its value is
     * relative to the current count, as reading the current count from
     * perf is faster than pausing and repgrogramming the event in order to
     * reset it to '0'.  Note, this very sneakily offsets the accumulated
     * emulated count too, by using pmc_read_counter()!
     */
    pmc->emulated_counter = 0;
    pmc->counter += val - pmc_read_counter(pmc);
    pmc->counter &= pmc_bitmask(pmc);
    pmc_update_sample_period(pmc);
}

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reprogram_counters()

static void reprogram_counters ( struct kvm_pmu *  pmu, u64  diff  )

inlinestatic

Definition at line 189 of file pmu.h.

{
    int bit;
 
    if (!diff)
        return;
 
    for_each_set_bit(bit, (unsigned long *)&diff, X86_PMC_IDX_MAX)
        set_bit(bit, pmu->reprogram_pmi);
    kvm_make_request(KVM_REQ_PMU, pmu_to_vcpu(pmu));
}

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Variable Documentation

amd_pmu_ops

struct kvm_pmu_ops amd_pmu_ops

extern

intel_pmu_ops

struct kvm_pmu_ops intel_pmu_ops

extern

kvm_pmu_cap

struct x86_pmu_capability kvm_pmu_cap

extern

Definition at line 1 of file pmu.c.