lapic.h File Reference

#include <kvm/iodev.h>
#include <linux/kvm_host.h>
#include "hyperv.h"
#include "smm.h"

Include dependency graph for lapic.h:

This graph shows which files directly or indirectly include this file:

Go to the source code of this file.

Classes
struct	kvm_timer
struct	kvm_lapic

Macros
#define	KVM_APIC_INIT   0
#define	KVM_APIC_SIPI   1
#define	APIC_SHORT_MASK   0xc0000
#define	APIC_DEST_NOSHORT   0x0
#define	APIC_DEST_MASK   0x800
#define	APIC_BUS_CYCLE_NS   1
#define	APIC_BUS_FREQUENCY   (1000000000ULL / APIC_BUS_CYCLE_NS)
#define	APIC_BROADCAST   0xFF
#define	X2APIC_BROADCAST   0xFFFFFFFFul
#define	APIC_LVTx(x)   ((x) == LVT_CMCI ? APIC_LVTCMCI : APIC_LVTT + 0x10 * (x))
#define	VEC_POS(v)   ((v) & (32 - 1))
#define	REG_POS(v)   (((v) >> 5) << 4)

Enumerations
enum	lapic_mode { LAPIC_MODE_DISABLED = 0 , LAPIC_MODE_INVALID = X2APIC_ENABLE , LAPIC_MODE_XAPIC = MSR_IA32_APICBASE_ENABLE , LAPIC_MODE_X2APIC = MSR_IA32_APICBASE_ENABLE | X2APIC_ENABLE }
enum	lapic_lvt_entry {   LVT_TIMER , LVT_THERMAL_MONITOR , LVT_PERFORMANCE_COUNTER , LVT_LINT0 ,   LVT_LINT1 , LVT_ERROR , LVT_CMCI , KVM_APIC_MAX_NR_LVT_ENTRIES }

Functions
int	kvm_create_lapic (struct kvm_vcpu *vcpu, int timer_advance_ns)
void	kvm_free_lapic (struct kvm_vcpu *vcpu)
int	kvm_apic_has_interrupt (struct kvm_vcpu *vcpu)
int	kvm_apic_accept_pic_intr (struct kvm_vcpu *vcpu)
int	kvm_get_apic_interrupt (struct kvm_vcpu *vcpu)
int	kvm_apic_accept_events (struct kvm_vcpu *vcpu)
void	kvm_lapic_reset (struct kvm_vcpu *vcpu, bool init_event)
u64	kvm_lapic_get_cr8 (struct kvm_vcpu *vcpu)
void	kvm_lapic_set_tpr (struct kvm_vcpu *vcpu, unsigned long cr8)
void	kvm_lapic_set_eoi (struct kvm_vcpu *vcpu)
void	kvm_lapic_set_base (struct kvm_vcpu *vcpu, u64 value)
u64	kvm_lapic_get_base (struct kvm_vcpu *vcpu)
void	kvm_recalculate_apic_map (struct kvm *kvm)
void	kvm_apic_set_version (struct kvm_vcpu *vcpu)
void	kvm_apic_after_set_mcg_cap (struct kvm_vcpu *vcpu)
bool	kvm_apic_match_dest (struct kvm_vcpu *vcpu, struct kvm_lapic *source, int shorthand, unsigned int dest, int dest_mode)
int	kvm_apic_compare_prio (struct kvm_vcpu *vcpu1, struct kvm_vcpu *vcpu2)
void	kvm_apic_clear_irr (struct kvm_vcpu *vcpu, int vec)
bool	__kvm_apic_update_irr (u32 *pir, void *regs, int *max_irr)
bool	kvm_apic_update_irr (struct kvm_vcpu *vcpu, u32 *pir, int *max_irr)
void	kvm_apic_update_ppr (struct kvm_vcpu *vcpu)
int	kvm_apic_set_irq (struct kvm_vcpu *vcpu, struct kvm_lapic_irq *irq, struct dest_map *dest_map)
int	kvm_apic_local_deliver (struct kvm_lapic *apic, int lvt_type)
void	kvm_apic_update_apicv (struct kvm_vcpu *vcpu)
int	kvm_alloc_apic_access_page (struct kvm *kvm)
void	kvm_inhibit_apic_access_page (struct kvm_vcpu *vcpu)
bool	kvm_irq_delivery_to_apic_fast (struct kvm *kvm, struct kvm_lapic *src, struct kvm_lapic_irq *irq, int *r, struct dest_map *dest_map)
void	kvm_apic_send_ipi (struct kvm_lapic *apic, u32 icr_low, u32 icr_high)
u64	kvm_get_apic_base (struct kvm_vcpu *vcpu)
int	kvm_set_apic_base (struct kvm_vcpu *vcpu, struct msr_data *msr_info)
int	kvm_apic_get_state (struct kvm_vcpu *vcpu, struct kvm_lapic_state *s)
int	kvm_apic_set_state (struct kvm_vcpu *vcpu, struct kvm_lapic_state *s)
enum lapic_mode	kvm_get_apic_mode (struct kvm_vcpu *vcpu)
int	kvm_lapic_find_highest_irr (struct kvm_vcpu *vcpu)
u64	kvm_get_lapic_tscdeadline_msr (struct kvm_vcpu *vcpu)
void	kvm_set_lapic_tscdeadline_msr (struct kvm_vcpu *vcpu, u64 data)
void	kvm_apic_write_nodecode (struct kvm_vcpu *vcpu, u32 offset)
void	kvm_apic_set_eoi_accelerated (struct kvm_vcpu *vcpu, int vector)
int	kvm_lapic_set_vapic_addr (struct kvm_vcpu *vcpu, gpa_t vapic_addr)
void	kvm_lapic_sync_from_vapic (struct kvm_vcpu *vcpu)
void	kvm_lapic_sync_to_vapic (struct kvm_vcpu *vcpu)
int	kvm_x2apic_icr_write (struct kvm_lapic *apic, u64 data)
int	kvm_x2apic_msr_write (struct kvm_vcpu *vcpu, u32 msr, u64 data)
int	kvm_x2apic_msr_read (struct kvm_vcpu *vcpu, u32 msr, u64 *data)
int	kvm_hv_vapic_msr_write (struct kvm_vcpu *vcpu, u32 msr, u64 data)
int	kvm_hv_vapic_msr_read (struct kvm_vcpu *vcpu, u32 msr, u64 *data)
int	kvm_lapic_set_pv_eoi (struct kvm_vcpu *vcpu, u64 data, unsigned long len)
void	kvm_lapic_exit (void)
u64	kvm_lapic_readable_reg_mask (struct kvm_lapic *apic)
static void	kvm_lapic_clear_vector (int vec, void *bitmap)
static void	kvm_lapic_set_vector (int vec, void *bitmap)
static void	kvm_lapic_set_irr (int vec, struct kvm_lapic *apic)
static u32	__kvm_lapic_get_reg (char *regs, int reg_off)
static u32	kvm_lapic_get_reg (struct kvm_lapic *apic, int reg_off)
	DECLARE_STATIC_KEY_FALSE (kvm_has_noapic_vcpu)
static bool	lapic_in_kernel (struct kvm_vcpu *vcpu)
static bool	kvm_apic_hw_enabled (struct kvm_lapic *apic)
static bool	kvm_apic_sw_enabled (struct kvm_lapic *apic)
static bool	kvm_apic_present (struct kvm_vcpu *vcpu)
static int	kvm_lapic_enabled (struct kvm_vcpu *vcpu)
static int	apic_x2apic_mode (struct kvm_lapic *apic)
static bool	kvm_vcpu_apicv_active (struct kvm_vcpu *vcpu)
static bool	kvm_apic_has_pending_init_or_sipi (struct kvm_vcpu *vcpu)
static bool	kvm_apic_init_sipi_allowed (struct kvm_vcpu *vcpu)
static bool	kvm_lowest_prio_delivery (struct kvm_lapic_irq *irq)
static int	kvm_lapic_latched_init (struct kvm_vcpu *vcpu)
bool	kvm_apic_pending_eoi (struct kvm_vcpu *vcpu, int vector)
void	kvm_wait_lapic_expire (struct kvm_vcpu *vcpu)
void	kvm_bitmap_or_dest_vcpus (struct kvm *kvm, struct kvm_lapic_irq *irq, unsigned long *vcpu_bitmap)
bool	kvm_intr_is_single_vcpu_fast (struct kvm *kvm, struct kvm_lapic_irq *irq, struct kvm_vcpu **dest_vcpu)
int	kvm_vector_to_index (u32 vector, u32 dest_vcpus, const unsigned long *bitmap, u32 bitmap_size)
void	kvm_lapic_switch_to_sw_timer (struct kvm_vcpu *vcpu)
void	kvm_lapic_switch_to_hv_timer (struct kvm_vcpu *vcpu)
void	kvm_lapic_expired_hv_timer (struct kvm_vcpu *vcpu)
bool	kvm_lapic_hv_timer_in_use (struct kvm_vcpu *vcpu)
void	kvm_lapic_restart_hv_timer (struct kvm_vcpu *vcpu)
bool	kvm_can_use_hv_timer (struct kvm_vcpu *vcpu)
static enum lapic_mode	kvm_apic_mode (u64 apic_base)
static u8	kvm_xapic_id (struct kvm_lapic *apic)

Variables
struct static_key_false_deferred	apic_hw_disabled
struct static_key_false_deferred	apic_sw_disabled

Macro Definition Documentation

APIC_BROADCAST

#define APIC_BROADCAST   0xFF

Definition at line 22 of file lapic.h.

APIC_BUS_CYCLE_NS

#define APIC_BUS_CYCLE_NS   1

Definition at line 19 of file lapic.h.

APIC_BUS_FREQUENCY

#define APIC_BUS_FREQUENCY   (1000000000ULL / APIC_BUS_CYCLE_NS)

Definition at line 20 of file lapic.h.

APIC_DEST_MASK

#define APIC_DEST_MASK   0x800

Definition at line 17 of file lapic.h.

APIC_DEST_NOSHORT

#define APIC_DEST_NOSHORT   0x0

Definition at line 16 of file lapic.h.

APIC_LVTx

#define APIC_LVTx

(

x

)

((x) == LVT_CMCI ? APIC_LVTCMCI : APIC_LVTT + 0x10 * (x))

Definition at line 44 of file lapic.h.

APIC_SHORT_MASK

#define APIC_SHORT_MASK   0xc0000

Definition at line 15 of file lapic.h.

KVM_APIC_INIT

#define KVM_APIC_INIT   0

Definition at line 12 of file lapic.h.

KVM_APIC_SIPI

#define KVM_APIC_SIPI   1

Definition at line 13 of file lapic.h.

REG_POS

#define REG_POS

(

v

)

(((v) >> 5) << 4)

Definition at line 152 of file lapic.h.

VEC_POS

#define VEC_POS

(

v

)

((v) & (32 - 1))

Definition at line 151 of file lapic.h.

X2APIC_BROADCAST

#define X2APIC_BROADCAST   0xFFFFFFFFul

Definition at line 23 of file lapic.h.

Enumeration Type Documentation

lapic_lvt_entry

enum lapic_lvt_entry

Enumerator
LVT_TIMER
LVT_THERMAL_MONITOR
LVT_PERFORMANCE_COUNTER
LVT_LINT0
LVT_LINT1
LVT_ERROR
LVT_CMCI
KVM_APIC_MAX_NR_LVT_ENTRIES

Definition at line 32 of file lapic.h.

                     {
    LVT_TIMER,
    LVT_THERMAL_MONITOR,
    LVT_PERFORMANCE_COUNTER,
    LVT_LINT0,
    LVT_LINT1,
    LVT_ERROR,
    LVT_CMCI,
 
    KVM_APIC_MAX_NR_LVT_ENTRIES,
};

lapic_mode

enum lapic_mode

Enumerator
LAPIC_MODE_DISABLED
LAPIC_MODE_INVALID
LAPIC_MODE_XAPIC
LAPIC_MODE_X2APIC

Definition at line 25 of file lapic.h.

                {
    LAPIC_MODE_DISABLED = 0,
    LAPIC_MODE_INVALID = X2APIC_ENABLE,
    LAPIC_MODE_XAPIC = MSR_IA32_APICBASE_ENABLE,
    LAPIC_MODE_X2APIC = MSR_IA32_APICBASE_ENABLE | X2APIC_ENABLE,
};

Function Documentation

__kvm_apic_update_irr()

bool __kvm_apic_update_irr	(	u32 *	pir,
		void *	regs,
		int *	max_irr
	)

Definition at line 654 of file lapic.c.

{
    u32 i, vec;
    u32 pir_val, irr_val, prev_irr_val;
    int max_updated_irr;
 
    max_updated_irr = -1;
    *max_irr = -1;
 
    for (i = vec = 0; i <= 7; i++, vec += 32) {
        u32 *p_irr = (u32 *)(regs + APIC_IRR + i * 0x10);
 
        irr_val = *p_irr;
        pir_val = READ_ONCE(pir[i]);
 
        if (pir_val) {
            pir_val = xchg(&pir[i], 0);
 
            prev_irr_val = irr_val;
            do {
                irr_val = prev_irr_val | pir_val;
            } while (prev_irr_val != irr_val &&
                 !try_cmpxchg(p_irr, &prev_irr_val, irr_val));
 
            if (prev_irr_val != irr_val)
                max_updated_irr = __fls(irr_val ^ prev_irr_val) + vec;
        }
        if (irr_val)
            *max_irr = __fls(irr_val) + vec;
    }
 
    return ((max_updated_irr != -1) &&
        (max_updated_irr == *max_irr));
}

Here is the caller graph for this function:

__kvm_lapic_get_reg()

static u32 __kvm_lapic_get_reg ( char *  regs, int  reg_off  )

inlinestatic

Definition at line 174 of file lapic.h.

{
    return *((u32 *) (regs + reg_off));
}

Here is the caller graph for this function:

apic_x2apic_mode()

static int apic_x2apic_mode ( struct kvm_lapic *  apic )

inlinestatic

Definition at line 221 of file lapic.h.

{
    return apic->vcpu->arch.apic_base & X2APIC_ENABLE;
}

Here is the caller graph for this function:

DECLARE_STATIC_KEY_FALSE()

DECLARE_STATIC_KEY_FALSE

(

kvm_has_noapic_vcpu

)

kvm_alloc_apic_access_page()

int kvm_alloc_apic_access_page

(

struct kvm *

kvm

)

Definition at line 2598 of file lapic.c.

{
    struct page *page;
    void __user *hva;
    int ret = 0;
 
    mutex_lock(&kvm->slots_lock);
    if (kvm->arch.apic_access_memslot_enabled ||
        kvm->arch.apic_access_memslot_inhibited)
        goto out;
 
    hva = __x86_set_memory_region(kvm, APIC_ACCESS_PAGE_PRIVATE_MEMSLOT,
                      APIC_DEFAULT_PHYS_BASE, PAGE_SIZE);
    if (IS_ERR(hva)) {
        ret = PTR_ERR(hva);
        goto out;
    }
 
    page = gfn_to_page(kvm, APIC_DEFAULT_PHYS_BASE >> PAGE_SHIFT);
    if (is_error_page(page)) {
        ret = -EFAULT;
        goto out;
    }
 
    /*
     * Do not pin the page in memory, so that memory hot-unplug
     * is able to migrate it.
     */
    put_page(page);
    kvm->arch.apic_access_memslot_enabled = true;
out:
    mutex_unlock(&kvm->slots_lock);
    return ret;
}

Here is the call graph for this function:

Here is the caller graph for this function:

kvm_apic_accept_events()

int kvm_apic_accept_events

(

struct kvm_vcpu *

vcpu

)

Definition at line 3263 of file lapic.c.

{
    struct kvm_lapic *apic = vcpu->arch.apic;
    u8 sipi_vector;
    int r;
 
    if (!kvm_apic_has_pending_init_or_sipi(vcpu))
        return 0;
 
    if (is_guest_mode(vcpu)) {
        r = kvm_check_nested_events(vcpu);
        if (r < 0)
            return r == -EBUSY ? 0 : r;
        /*
         * Continue processing INIT/SIPI even if a nested VM-Exit
         * occurred, e.g. pending SIPIs should be dropped if INIT+SIPI
         * are blocked as a result of transitioning to VMX root mode.
         */
    }
 
    /*
     * INITs are blocked while CPU is in specific states (SMM, VMX root
     * mode, SVM with GIF=0), while SIPIs are dropped if the CPU isn't in
     * wait-for-SIPI (WFS).
     */
    if (!kvm_apic_init_sipi_allowed(vcpu)) {
        WARN_ON_ONCE(vcpu->arch.mp_state == KVM_MP_STATE_INIT_RECEIVED);
        clear_bit(KVM_APIC_SIPI, &apic->pending_events);
        return 0;
    }
 
    if (test_and_clear_bit(KVM_APIC_INIT, &apic->pending_events)) {
        kvm_vcpu_reset(vcpu, true);
        if (kvm_vcpu_is_bsp(apic->vcpu))
            vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
        else
            vcpu->arch.mp_state = KVM_MP_STATE_INIT_RECEIVED;
    }
    if (test_and_clear_bit(KVM_APIC_SIPI, &apic->pending_events)) {
        if (vcpu->arch.mp_state == KVM_MP_STATE_INIT_RECEIVED) {
            /* evaluate pending_events before reading the vector */
            smp_rmb();
            sipi_vector = apic->sipi_vector;
            static_call(kvm_x86_vcpu_deliver_sipi_vector)(vcpu, sipi_vector);
            vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
        }
    }
    return 0;
}

Here is the call graph for this function:

Here is the caller graph for this function:

kvm_apic_accept_pic_intr()

int kvm_apic_accept_pic_intr

(

struct kvm_vcpu *

vcpu

)

Definition at line 2872 of file lapic.c.

{
    u32 lvt0 = kvm_lapic_get_reg(vcpu->arch.apic, APIC_LVT0);
 
    if (!kvm_apic_hw_enabled(vcpu->arch.apic))
        return 1;
    if ((lvt0 & APIC_LVT_MASKED) == 0 &&
        GET_APIC_DELIVERY_MODE(lvt0) == APIC_MODE_EXTINT)
        return 1;
    return 0;
}

Here is the call graph for this function:

Here is the caller graph for this function:

kvm_apic_after_set_mcg_cap()

void kvm_apic_after_set_mcg_cap

(

struct kvm_vcpu *

vcpu

)

Definition at line 596 of file lapic.c.

{
    int nr_lvt_entries = kvm_apic_calc_nr_lvt_entries(vcpu);
    struct kvm_lapic *apic = vcpu->arch.apic;
    int i;
 
    if (!lapic_in_kernel(vcpu) || nr_lvt_entries == apic->nr_lvt_entries)
        return;
 
    /* Initialize/mask any "new" LVT entries. */
    for (i = apic->nr_lvt_entries; i < nr_lvt_entries; i++)
        kvm_lapic_set_reg(apic, APIC_LVTx(i), APIC_LVT_MASKED);
 
    apic->nr_lvt_entries = nr_lvt_entries;
 
    /* The number of LVT entries is reflected in the version register. */
    kvm_apic_set_version(vcpu);
}

Here is the call graph for this function:

Here is the caller graph for this function:

kvm_apic_clear_irr()

void kvm_apic_clear_irr	(	struct kvm_vcpu *	vcpu,
		int	vec
	)

Definition at line 738 of file lapic.c.

{
    apic_clear_irr(vec, vcpu->arch.apic);
}

Here is the call graph for this function:

Here is the caller graph for this function:

kvm_apic_compare_prio()

int kvm_apic_compare_prio	(	struct kvm_vcpu *	vcpu1,
		struct kvm_vcpu *	vcpu2
	)

Definition at line 1432 of file lapic.c.

{
    return vcpu1->arch.apic_arb_prio - vcpu2->arch.apic_arb_prio;
}

Here is the caller graph for this function:

kvm_apic_get_state()

int kvm_apic_get_state	(	struct kvm_vcpu *	vcpu,
		struct kvm_lapic_state *	s
	)

Definition at line 2970 of file lapic.c.

{
    memcpy(s->regs, vcpu->arch.apic->regs, sizeof(*s));
 
    /*
     * Get calculated timer current count for remaining timer period (if
     * any) and store it in the returned register set.
     */
    __kvm_lapic_set_reg(s->regs, APIC_TMCCT,
                __apic_read(vcpu->arch.apic, APIC_TMCCT));
 
    return kvm_apic_state_fixup(vcpu, s, false);
}

Here is the call graph for this function:

Here is the caller graph for this function:

kvm_apic_has_interrupt()

int kvm_apic_has_interrupt

(

struct kvm_vcpu *

vcpu

)

Definition at line 2859 of file lapic.c.

{
    struct kvm_lapic *apic = vcpu->arch.apic;
    u32 ppr;
 
    if (!kvm_apic_present(vcpu))
        return -1;
 
    __apic_update_ppr(apic, &ppr);
    return apic_has_interrupt_for_ppr(apic, ppr);
}

Here is the call graph for this function:

Here is the caller graph for this function:

kvm_apic_has_pending_init_or_sipi()

static bool kvm_apic_has_pending_init_or_sipi ( struct kvm_vcpu *  vcpu )

inlinestatic

Definition at line 231 of file lapic.h.

{
    return lapic_in_kernel(vcpu) && vcpu->arch.apic->pending_events;
}

Here is the call graph for this function:

Here is the caller graph for this function:

kvm_apic_hw_enabled()

static bool kvm_apic_hw_enabled ( struct kvm_lapic *  apic )

inlinestatic

Definition at line 195 of file lapic.h.

{
    if (static_branch_unlikely(&apic_hw_disabled.key))
        return apic->vcpu->arch.apic_base & MSR_IA32_APICBASE_ENABLE;
    return true;
}

Here is the caller graph for this function:

kvm_apic_init_sipi_allowed()

static bool kvm_apic_init_sipi_allowed ( struct kvm_vcpu *  vcpu )

inlinestatic

Definition at line 236 of file lapic.h.

{
    return !is_smm(vcpu) &&
           !static_call(kvm_x86_apic_init_signal_blocked)(vcpu);
}

Here is the call graph for this function:

Here is the caller graph for this function:

kvm_apic_local_deliver()

int kvm_apic_local_deliver	(	struct kvm_lapic *	apic,
		int	lvt_type
	)

Definition at line 2762 of file lapic.c.

{
    u32 reg = kvm_lapic_get_reg(apic, lvt_type);
    int vector, mode, trig_mode;
    int r;
 
    if (kvm_apic_hw_enabled(apic) && !(reg & APIC_LVT_MASKED)) {
        vector = reg & APIC_VECTOR_MASK;
        mode = reg & APIC_MODE_MASK;
        trig_mode = reg & APIC_LVT_LEVEL_TRIGGER;
 
        r = __apic_accept_irq(apic, mode, vector, 1, trig_mode, NULL);
        if (r && lvt_type == APIC_LVTPC &&
            guest_cpuid_is_intel_compatible(apic->vcpu))
            kvm_lapic_set_reg(apic, APIC_LVTPC, reg | APIC_LVT_MASKED);
        return r;
    }
    return 0;
}

Here is the call graph for this function:

Here is the caller graph for this function:

kvm_apic_match_dest()

bool kvm_apic_match_dest	(	struct kvm_vcpu *	vcpu,
		struct kvm_lapic *	source,
		int	shorthand,
		unsigned int	dest,
		int	dest_mode
	)

Definition at line 1067 of file lapic.c.

{
    struct kvm_lapic *target = vcpu->arch.apic;
    u32 mda = kvm_apic_mda(vcpu, dest, source, target);
 
    ASSERT(target);
    switch (shorthand) {
    case APIC_DEST_NOSHORT:
        if (dest_mode == APIC_DEST_PHYSICAL)
            return kvm_apic_match_physical_addr(target, mda);
        else
            return kvm_apic_match_logical_addr(target, mda);
    case APIC_DEST_SELF:
        return target == source;
    case APIC_DEST_ALLINC:
        return true;
    case APIC_DEST_ALLBUT:
        return target != source;
    default:
        return false;
    }
}

Here is the call graph for this function:

Here is the caller graph for this function:

kvm_apic_mode()

static enum lapic_mode kvm_apic_mode ( u64  apic_base )

inlinestatic

Definition at line 269 of file lapic.h.

{
    return apic_base & (MSR_IA32_APICBASE_ENABLE | X2APIC_ENABLE);
}

Here is the caller graph for this function:

kvm_apic_pending_eoi()

bool kvm_apic_pending_eoi	(	struct kvm_vcpu *	vcpu,
		int	vector
	)

Definition at line 110 of file lapic.c.

{
    struct kvm_lapic *apic = vcpu->arch.apic;
 
    return apic_test_vector(vector, apic->regs + APIC_ISR) ||
        apic_test_vector(vector, apic->regs + APIC_IRR);
}

Here is the call graph for this function:

Here is the caller graph for this function:

kvm_apic_present()

static bool kvm_apic_present ( struct kvm_vcpu *  vcpu )

inlinestatic

Definition at line 211 of file lapic.h.

{
    return lapic_in_kernel(vcpu) && kvm_apic_hw_enabled(vcpu->arch.apic);
}

Here is the call graph for this function:

Here is the caller graph for this function:

kvm_apic_send_ipi()

void kvm_apic_send_ipi	(	struct kvm_lapic *	apic,
		u32	icr_low,
		u32	icr_high
	)

Definition at line 1504 of file lapic.c.

{
    struct kvm_lapic_irq irq;
 
    /* KVM has no delay and should always clear the BUSY/PENDING flag. */
    WARN_ON_ONCE(icr_low & APIC_ICR_BUSY);
 
    irq.vector = icr_low & APIC_VECTOR_MASK;
    irq.delivery_mode = icr_low & APIC_MODE_MASK;
    irq.dest_mode = icr_low & APIC_DEST_MASK;
    irq.level = (icr_low & APIC_INT_ASSERT) != 0;
    irq.trig_mode = icr_low & APIC_INT_LEVELTRIG;
    irq.shorthand = icr_low & APIC_SHORT_MASK;
    irq.msi_redir_hint = false;
    if (apic_x2apic_mode(apic))
        irq.dest_id = icr_high;
    else
        irq.dest_id = GET_XAPIC_DEST_FIELD(icr_high);
 
    trace_kvm_apic_ipi(icr_low, irq.dest_id);
 
    kvm_irq_delivery_to_apic(apic->vcpu->kvm, apic, &irq, NULL);
}

Here is the call graph for this function:

Here is the caller graph for this function:

kvm_apic_set_eoi_accelerated()

void kvm_apic_set_eoi_accelerated	(	struct kvm_vcpu *	vcpu,
		int	vector
	)

Definition at line 1493 of file lapic.c.

{
    struct kvm_lapic *apic = vcpu->arch.apic;
 
    trace_kvm_eoi(apic, vector);
 
    kvm_ioapic_send_eoi(apic, vector);
    kvm_make_request(KVM_REQ_EVENT, apic->vcpu);
}

Here is the call graph for this function:

Here is the caller graph for this function:

kvm_apic_set_irq()

int kvm_apic_set_irq	(	struct kvm_vcpu *	vcpu,
		struct kvm_lapic_irq *	irq,
		struct dest_map *	dest_map
	)

Definition at line 823 of file lapic.c.

{
    struct kvm_lapic *apic = vcpu->arch.apic;
 
    return __apic_accept_irq(apic, irq->delivery_mode, irq->vector,
            irq->level, irq->trig_mode, dest_map);
}

Here is the call graph for this function:

Here is the caller graph for this function:

kvm_apic_set_state()

int kvm_apic_set_state	(	struct kvm_vcpu *	vcpu,
		struct kvm_lapic_state *	s
	)

Definition at line 2984 of file lapic.c.

{
    struct kvm_lapic *apic = vcpu->arch.apic;
    int r;
 
    static_call_cond(kvm_x86_apicv_pre_state_restore)(vcpu);
 
    kvm_lapic_set_base(vcpu, vcpu->arch.apic_base);
    /* set SPIV separately to get count of SW disabled APICs right */
    apic_set_spiv(apic, *((u32 *)(s->regs + APIC_SPIV)));
 
    r = kvm_apic_state_fixup(vcpu, s, true);
    if (r) {
        kvm_recalculate_apic_map(vcpu->kvm);
        return r;
    }
    memcpy(vcpu->arch.apic->regs, s->regs, sizeof(*s));
 
    atomic_set_release(&apic->vcpu->kvm->arch.apic_map_dirty, DIRTY);
    kvm_recalculate_apic_map(vcpu->kvm);
    kvm_apic_set_version(vcpu);
 
    apic_update_ppr(apic);
    cancel_apic_timer(apic);
    apic->lapic_timer.expired_tscdeadline = 0;
    apic_update_lvtt(apic);
    apic_manage_nmi_watchdog(apic, kvm_lapic_get_reg(apic, APIC_LVT0));
    update_divide_count(apic);
    __start_apic_timer(apic, APIC_TMCCT);
    kvm_lapic_set_reg(apic, APIC_TMCCT, 0);
    kvm_apic_update_apicv(vcpu);
    if (apic->apicv_active) {
        static_call_cond(kvm_x86_apicv_post_state_restore)(vcpu);
        static_call_cond(kvm_x86_hwapic_irr_update)(vcpu, apic_find_highest_irr(apic));
        static_call_cond(kvm_x86_hwapic_isr_update)(apic_find_highest_isr(apic));
    }
    kvm_make_request(KVM_REQ_EVENT, vcpu);
    if (ioapic_in_kernel(vcpu->kvm))
        kvm_rtc_eoi_tracking_restore_one(vcpu);
 
    vcpu->arch.apic_arb_prio = 0;
 
    return 0;
}

Here is the call graph for this function:

Here is the caller graph for this function:

kvm_apic_set_version()

void kvm_apic_set_version

(

struct kvm_vcpu *

vcpu

)

Definition at line 573 of file lapic.c.

{
    struct kvm_lapic *apic = vcpu->arch.apic;
    u32 v = 0;
 
    if (!lapic_in_kernel(vcpu))
        return;
 
    v = APIC_VERSION | ((apic->nr_lvt_entries - 1) << 16);
 
    /*
     * KVM emulates 82093AA datasheet (with in-kernel IOAPIC implementation)
     * which doesn't have EOI register; Some buggy OSes (e.g. Windows with
     * Hyper-V role) disable EOI broadcast in lapic not checking for IOAPIC
     * version first and level-triggered interrupts never get EOIed in
     * IOAPIC.
     */
    if (guest_cpuid_has(vcpu, X86_FEATURE_X2APIC) &&
        !ioapic_in_kernel(vcpu->kvm))
        v |= APIC_LVR_DIRECTED_EOI;
    kvm_lapic_set_reg(apic, APIC_LVR, v);
}

Here is the call graph for this function:

Here is the caller graph for this function:

kvm_apic_sw_enabled()

static bool kvm_apic_sw_enabled ( struct kvm_lapic *  apic )

inlinestatic

Definition at line 204 of file lapic.h.

{
    if (static_branch_unlikely(&apic_sw_disabled.key))
        return apic->sw_enabled;
    return true;
}

Here is the caller graph for this function:

kvm_apic_update_apicv()

void kvm_apic_update_apicv

(

struct kvm_vcpu *

vcpu

)

Definition at line 2578 of file lapic.c.

{
    struct kvm_lapic *apic = vcpu->arch.apic;
 
    if (apic->apicv_active) {
        /* irr_pending is always true when apicv is activated. */
        apic->irr_pending = true;
        apic->isr_count = 1;
    } else {
        /*
         * Don't clear irr_pending, searching the IRR can race with
         * updates from the CPU as APICv is still active from hardware's
         * perspective.  The flag will be cleared as appropriate when
         * KVM injects the interrupt.
         */
        apic->isr_count = count_vectors(apic->regs + APIC_ISR);
    }
    apic->highest_isr_cache = -1;
}

Here is the call graph for this function:

Here is the caller graph for this function:

kvm_apic_update_irr()

bool kvm_apic_update_irr	(	struct kvm_vcpu *	vcpu,
		u32 *	pir,
		int *	max_irr
	)

Definition at line 690 of file lapic.c.

{
    struct kvm_lapic *apic = vcpu->arch.apic;
    bool irr_updated = __kvm_apic_update_irr(pir, apic->regs, max_irr);
 
    if (unlikely(!apic->apicv_active && irr_updated))
        apic->irr_pending = true;
    return irr_updated;
}

Here is the call graph for this function:

Here is the caller graph for this function:

kvm_apic_update_ppr()

void kvm_apic_update_ppr

(

struct kvm_vcpu *

vcpu

)

Definition at line 975 of file lapic.c.

{
    apic_update_ppr(vcpu->arch.apic);
}

Here is the call graph for this function:

Here is the caller graph for this function:

kvm_apic_write_nodecode()

void kvm_apic_write_nodecode	(	struct kvm_vcpu *	vcpu,
		u32	offset
	)

Definition at line 2446 of file lapic.c.

{
    struct kvm_lapic *apic = vcpu->arch.apic;
 
    /*
     * ICR is a single 64-bit register when x2APIC is enabled, all others
     * registers hold 32-bit values.  For legacy xAPIC, ICR writes need to
     * go down the common path to get the upper half from ICR2.
     *
     * Note, using the write helpers may incur an unnecessary write to the
     * virtual APIC state, but KVM needs to conditionally modify the value
     * in certain cases, e.g. to clear the ICR busy bit.  The cost of extra
     * conditional branches is likely a wash relative to the cost of the
     * maybe-unecessary write, and both are in the noise anyways.
     */
    if (apic_x2apic_mode(apic) && offset == APIC_ICR)
        kvm_x2apic_icr_write(apic, kvm_lapic_get_reg64(apic, APIC_ICR));
    else
        kvm_lapic_reg_write(apic, offset, kvm_lapic_get_reg(apic, offset));
}

Here is the call graph for this function:

Here is the caller graph for this function:

kvm_bitmap_or_dest_vcpus()

void kvm_bitmap_or_dest_vcpus	(	struct kvm *	kvm,
		struct kvm_lapic_irq *	irq,
		unsigned long *	vcpu_bitmap
	)

Definition at line 1394 of file lapic.c.

{
    struct kvm_lapic **dest_vcpu = NULL;
    struct kvm_lapic *src = NULL;
    struct kvm_apic_map *map;
    struct kvm_vcpu *vcpu;
    unsigned long bitmap, i;
    int vcpu_idx;
    bool ret;
 
    rcu_read_lock();
    map = rcu_dereference(kvm->arch.apic_map);
 
    ret = kvm_apic_map_get_dest_lapic(kvm, &src, irq, map, &dest_vcpu,
                      &bitmap);
    if (ret) {
        for_each_set_bit(i, &bitmap, 16) {
            if (!dest_vcpu[i])
                continue;
            vcpu_idx = dest_vcpu[i]->vcpu->vcpu_idx;
            __set_bit(vcpu_idx, vcpu_bitmap);
        }
    } else {
        kvm_for_each_vcpu(i, vcpu, kvm) {
            if (!kvm_apic_present(vcpu))
                continue;
            if (!kvm_apic_match_dest(vcpu, NULL,
                         irq->shorthand,
                         irq->dest_id,
                         irq->dest_mode))
                continue;
            __set_bit(i, vcpu_bitmap);
        }
    }
    rcu_read_unlock();
}

Here is the call graph for this function:

Here is the caller graph for this function:

kvm_can_use_hv_timer()

bool kvm_can_use_hv_timer

(

struct kvm_vcpu *

vcpu

)

Definition at line 154 of file lapic.c.

{
    return kvm_x86_ops.set_hv_timer
           && !(kvm_mwait_in_guest(vcpu->kvm) ||
            kvm_can_post_timer_interrupt(vcpu));
}

Here is the call graph for this function:

Here is the caller graph for this function:

kvm_create_lapic()

int kvm_create_lapic	(	struct kvm_vcpu *	vcpu,
		int	timer_advance_ns
	)

Definition at line 2810 of file lapic.c.

{
    struct kvm_lapic *apic;
 
    ASSERT(vcpu != NULL);
 
    apic = kzalloc(sizeof(*apic), GFP_KERNEL_ACCOUNT);
    if (!apic)
        goto nomem;
 
    vcpu->arch.apic = apic;
 
    apic->regs = (void *)get_zeroed_page(GFP_KERNEL_ACCOUNT);
    if (!apic->regs) {
        printk(KERN_ERR "malloc apic regs error for vcpu %x\n",
               vcpu->vcpu_id);
        goto nomem_free_apic;
    }
    apic->vcpu = vcpu;
 
    apic->nr_lvt_entries = kvm_apic_calc_nr_lvt_entries(vcpu);
 
    hrtimer_init(&apic->lapic_timer.timer, CLOCK_MONOTONIC,
             HRTIMER_MODE_ABS_HARD);
    apic->lapic_timer.timer.function = apic_timer_fn;
    if (timer_advance_ns == -1) {
        apic->lapic_timer.timer_advance_ns = LAPIC_TIMER_ADVANCE_NS_INIT;
        lapic_timer_advance_dynamic = true;
    } else {
        apic->lapic_timer.timer_advance_ns = timer_advance_ns;
        lapic_timer_advance_dynamic = false;
    }
 
    /*
     * Stuff the APIC ENABLE bit in lieu of temporarily incrementing
     * apic_hw_disabled; the full RESET value is set by kvm_lapic_reset().
     */
    vcpu->arch.apic_base = MSR_IA32_APICBASE_ENABLE;
    static_branch_inc(&apic_sw_disabled.key); /* sw disabled at reset */
    kvm_iodevice_init(&apic->dev, &apic_mmio_ops);
 
    return 0;
nomem_free_apic:
    kfree(apic);
    vcpu->arch.apic = NULL;
nomem:
    return -ENOMEM;
}

Here is the call graph for this function:

Here is the caller graph for this function:

kvm_free_lapic()

void kvm_free_lapic

(

struct kvm_vcpu *

vcpu

)

Definition at line 2468 of file lapic.c.

{
    struct kvm_lapic *apic = vcpu->arch.apic;
 
    if (!vcpu->arch.apic)
        return;
 
    hrtimer_cancel(&apic->lapic_timer.timer);
 
    if (!(vcpu->arch.apic_base & MSR_IA32_APICBASE_ENABLE))
        static_branch_slow_dec_deferred(&apic_hw_disabled);
 
    if (!apic->sw_enabled)
        static_branch_slow_dec_deferred(&apic_sw_disabled);
 
    if (apic->regs)
        free_page((unsigned long)apic->regs);
 
    kfree(apic);
}

Here is the caller graph for this function:

kvm_get_apic_base()

u64 kvm_get_apic_base

(

struct kvm_vcpu *

vcpu

)

Definition at line 474 of file x86.c.

{
    return vcpu->arch.apic_base;
}

Here is the caller graph for this function:

kvm_get_apic_interrupt()

int kvm_get_apic_interrupt

(

struct kvm_vcpu *

vcpu

)

Definition at line 2894 of file lapic.c.

{
    int vector = kvm_apic_has_interrupt(vcpu);
    struct kvm_lapic *apic = vcpu->arch.apic;
    u32 ppr;
 
    if (vector == -1)
        return -1;
 
    /*
     * We get here even with APIC virtualization enabled, if doing
     * nested virtualization and L1 runs with the "acknowledge interrupt
     * on exit" mode.  Then we cannot inject the interrupt via RVI,
     * because the process would deliver it through the IDT.
     */
 
    apic_clear_irr(vector, apic);
    if (kvm_hv_synic_auto_eoi_set(vcpu, vector)) {
        /*
         * For auto-EOI interrupts, there might be another pending
         * interrupt above PPR, so check whether to raise another
         * KVM_REQ_EVENT.
         */
        apic_update_ppr(apic);
    } else {
        /*
         * For normal interrupts, PPR has been raised and there cannot
         * be a higher-priority pending interrupt---except if there was
         * a concurrent interrupt injection, but that would have
         * triggered KVM_REQ_EVENT already.
         */
        apic_set_isr(vector, apic);
        __apic_update_ppr(apic, &ppr);
    }
 
    return vector;
}

Here is the call graph for this function:

Here is the caller graph for this function:

kvm_get_apic_mode()

enum lapic_mode kvm_get_apic_mode

(

struct kvm_vcpu *

vcpu

)

Definition at line 474 of file x86.c.

{
    return kvm_apic_mode(kvm_get_apic_base(vcpu));
}

Here is the caller graph for this function:

kvm_get_lapic_tscdeadline_msr()

u64 kvm_get_lapic_tscdeadline_msr

(

struct kvm_vcpu *

vcpu

)

Definition at line 2494 of file lapic.c.

{
    struct kvm_lapic *apic = vcpu->arch.apic;
 
    if (!kvm_apic_present(vcpu) || !apic_lvtt_tscdeadline(apic))
        return 0;
 
    return apic->lapic_timer.tscdeadline;
}

Here is the call graph for this function:

Here is the caller graph for this function:

kvm_hv_vapic_msr_read()

int kvm_hv_vapic_msr_read	(	struct kvm_vcpu *	vcpu,
		u32	msr,
		u64 *	data
	)

Definition at line 3229 of file lapic.c.

{
    if (!lapic_in_kernel(vcpu))
        return 1;
 
    return kvm_lapic_msr_read(vcpu->arch.apic, reg, data);
}

Here is the call graph for this function:

Here is the caller graph for this function:

kvm_hv_vapic_msr_write()

int kvm_hv_vapic_msr_write	(	struct kvm_vcpu *	vcpu,
		u32	msr,
		u64	data
	)

Definition at line 3221 of file lapic.c.

{
    if (!lapic_in_kernel(vcpu))
        return 1;
 
    return kvm_lapic_msr_write(vcpu->arch.apic, reg, data);
}

Here is the call graph for this function:

Here is the caller graph for this function:

kvm_inhibit_apic_access_page()

void kvm_inhibit_apic_access_page

(

struct kvm_vcpu *

vcpu

)

Definition at line 2634 of file lapic.c.

{
    struct kvm *kvm = vcpu->kvm;
 
    if (!kvm->arch.apic_access_memslot_enabled)
        return;
 
    kvm_vcpu_srcu_read_unlock(vcpu);
 
    mutex_lock(&kvm->slots_lock);
 
    if (kvm->arch.apic_access_memslot_enabled) {
        __x86_set_memory_region(kvm, APIC_ACCESS_PAGE_PRIVATE_MEMSLOT, 0, 0);
        /*
         * Clear "enabled" after the memslot is deleted so that a
         * different vCPU doesn't get a false negative when checking
         * the flag out of slots_lock.  No additional memory barrier is
         * needed as modifying memslots requires waiting other vCPUs to
         * drop SRCU (see above), and false positives are ok as the
         * flag is rechecked after acquiring slots_lock.
         */
        kvm->arch.apic_access_memslot_enabled = false;
 
        /*
         * Mark the memslot as inhibited to prevent reallocating the
         * memslot during vCPU creation, e.g. if a vCPU is hotplugged.
         */
        kvm->arch.apic_access_memslot_inhibited = true;
    }
 
    mutex_unlock(&kvm->slots_lock);
 
    kvm_vcpu_srcu_read_lock(vcpu);
}

Here is the call graph for this function:

Here is the caller graph for this function:

kvm_intr_is_single_vcpu_fast()

bool kvm_intr_is_single_vcpu_fast	(	struct kvm *	kvm,
		struct kvm_lapic_irq *	irq,
		struct kvm_vcpu **	dest_vcpu
	)

Definition at line 1259 of file lapic.c.

{
    struct kvm_apic_map *map;
    unsigned long bitmap;
    struct kvm_lapic **dst = NULL;
    bool ret = false;
 
    if (irq->shorthand)
        return false;
 
    rcu_read_lock();
    map = rcu_dereference(kvm->arch.apic_map);
 
    if (kvm_apic_map_get_dest_lapic(kvm, NULL, irq, map, &dst, &bitmap) &&
            hweight16(bitmap) == 1) {
        unsigned long i = find_first_bit(&bitmap, 16);
 
        if (dst[i]) {
            *dest_vcpu = dst[i]->vcpu;
            ret = true;
        }
    }
 
    rcu_read_unlock();
    return ret;
}

Here is the call graph for this function:

Here is the caller graph for this function:

kvm_irq_delivery_to_apic_fast()

bool kvm_irq_delivery_to_apic_fast	(	struct kvm *	kvm,
		struct kvm_lapic *	src,
		struct kvm_lapic_irq *	irq,
		int *	r,
		struct dest_map *	dest_map
	)

Definition at line 1208 of file lapic.c.

{
    struct kvm_apic_map *map;
    unsigned long bitmap;
    struct kvm_lapic **dst = NULL;
    int i;
    bool ret;
 
    *r = -1;
 
    if (irq->shorthand == APIC_DEST_SELF) {
        if (KVM_BUG_ON(!src, kvm)) {
            *r = 0;
            return true;
        }
        *r = kvm_apic_set_irq(src->vcpu, irq, dest_map);
        return true;
    }
 
    rcu_read_lock();
    map = rcu_dereference(kvm->arch.apic_map);
 
    ret = kvm_apic_map_get_dest_lapic(kvm, &src, irq, map, &dst, &bitmap);
    if (ret) {
        *r = 0;
        for_each_set_bit(i, &bitmap, 16) {
            if (!dst[i])
                continue;
            *r += kvm_apic_set_irq(dst[i]->vcpu, irq, dest_map);
        }
    }
 
    rcu_read_unlock();
    return ret;
}

Here is the call graph for this function:

Here is the caller graph for this function:

kvm_lapic_clear_vector()

static void kvm_lapic_clear_vector ( int  vec, void *  bitmap  )

inlinestatic

Definition at line 154 of file lapic.h.

{
    clear_bit(VEC_POS(vec), (bitmap) + REG_POS(vec));
}

Here is the caller graph for this function:

kvm_lapic_enabled()

static int kvm_lapic_enabled ( struct kvm_vcpu *  vcpu )

inlinestatic

Definition at line 216 of file lapic.h.

{
    return kvm_apic_present(vcpu) && kvm_apic_sw_enabled(vcpu->arch.apic);
}

Here is the call graph for this function:

Here is the caller graph for this function:

kvm_lapic_exit()

void kvm_lapic_exit

(

void

)

Definition at line 3313 of file lapic.c.

{
    static_key_deferred_flush(&apic_hw_disabled);
    WARN_ON(static_branch_unlikely(&apic_hw_disabled.key));
    static_key_deferred_flush(&apic_sw_disabled);
    WARN_ON(static_branch_unlikely(&apic_sw_disabled.key));
}

Here is the caller graph for this function:

kvm_lapic_expired_hv_timer()

void kvm_lapic_expired_hv_timer

(

struct kvm_vcpu *

vcpu

)

Definition at line 2171 of file lapic.c.

{
    struct kvm_lapic *apic = vcpu->arch.apic;
 
    preempt_disable();
    /* If the preempt notifier has already run, it also called apic_timer_expired */
    if (!apic->lapic_timer.hv_timer_in_use)
        goto out;
    WARN_ON(kvm_vcpu_is_blocking(vcpu));
    apic_timer_expired(apic, false);
    cancel_hv_timer(apic);
 
    if (apic_lvtt_period(apic) && apic->lapic_timer.period) {
        advance_periodic_target_expiration(apic);
        restart_apic_timer(apic);
    }
out:
    preempt_enable();
}

Here is the call graph for this function:

Here is the caller graph for this function:

kvm_lapic_find_highest_irr()

int kvm_lapic_find_highest_irr

(

struct kvm_vcpu *

vcpu

)

Definition at line 808 of file lapic.c.

{
    /* This may race with setting of irr in __apic_accept_irq() and
     * value returned may be wrong, but kvm_vcpu_kick() in __apic_accept_irq
     * will cause vmexit immediately and the value will be recalculated
     * on the next vmentry.
     */
    return apic_find_highest_irr(vcpu->arch.apic);
}

Here is the call graph for this function:

Here is the caller graph for this function:

kvm_lapic_get_base()

u64 kvm_lapic_get_base

(

struct kvm_vcpu *

vcpu

)

kvm_lapic_get_cr8()

u64 kvm_lapic_get_cr8

(

struct kvm_vcpu *

vcpu

)

Definition at line 2521 of file lapic.c.

{
    u64 tpr;
 
    tpr = (u64) kvm_lapic_get_reg(vcpu->arch.apic, APIC_TASKPRI);
 
    return (tpr & 0xf0) >> 4;
}

Here is the call graph for this function:

Here is the caller graph for this function:

kvm_lapic_get_reg()

static u32 kvm_lapic_get_reg ( struct kvm_lapic *  apic, int  reg_off  )

inlinestatic

Definition at line 179 of file lapic.h.

{
    return __kvm_lapic_get_reg(apic->regs, reg_off);
}

Here is the call graph for this function:

Here is the caller graph for this function:

kvm_lapic_hv_timer_in_use()

bool kvm_lapic_hv_timer_in_use

(

struct kvm_vcpu *

vcpu

)

Definition at line 2083 of file lapic.c.

{
    if (!lapic_in_kernel(vcpu))
        return false;
 
    return vcpu->arch.apic->lapic_timer.hv_timer_in_use;
}

Here is the call graph for this function:

Here is the caller graph for this function:

kvm_lapic_latched_init()

static int kvm_lapic_latched_init ( struct kvm_vcpu *  vcpu )

inlinestatic

Definition at line 248 of file lapic.h.

{
    return lapic_in_kernel(vcpu) && test_bit(KVM_APIC_INIT, &vcpu->arch.apic->pending_events);
}

Here is the call graph for this function:

Here is the caller graph for this function:

kvm_lapic_readable_reg_mask()

u64 kvm_lapic_readable_reg_mask

(

struct kvm_lapic *

apic

)

Definition at line 1607 of file lapic.c.

{
    /* Leave bits '0' for reserved and write-only registers. */
    u64 valid_reg_mask =
        APIC_REG_MASK(APIC_ID) |
        APIC_REG_MASK(APIC_LVR) |
        APIC_REG_MASK(APIC_TASKPRI) |
        APIC_REG_MASK(APIC_PROCPRI) |
        APIC_REG_MASK(APIC_LDR) |
        APIC_REG_MASK(APIC_SPIV) |
        APIC_REGS_MASK(APIC_ISR, APIC_ISR_NR) |
        APIC_REGS_MASK(APIC_TMR, APIC_ISR_NR) |
        APIC_REGS_MASK(APIC_IRR, APIC_ISR_NR) |
        APIC_REG_MASK(APIC_ESR) |
        APIC_REG_MASK(APIC_ICR) |
        APIC_REG_MASK(APIC_LVTT) |
        APIC_REG_MASK(APIC_LVTTHMR) |
        APIC_REG_MASK(APIC_LVTPC) |
        APIC_REG_MASK(APIC_LVT0) |
        APIC_REG_MASK(APIC_LVT1) |
        APIC_REG_MASK(APIC_LVTERR) |
        APIC_REG_MASK(APIC_TMICT) |
        APIC_REG_MASK(APIC_TMCCT) |
        APIC_REG_MASK(APIC_TDCR);
 
    if (kvm_lapic_lvt_supported(apic, LVT_CMCI))
        valid_reg_mask |= APIC_REG_MASK(APIC_LVTCMCI);
 
    /* ARBPRI, DFR, and ICR2 are not valid in x2APIC mode. */
    if (!apic_x2apic_mode(apic))
        valid_reg_mask |= APIC_REG_MASK(APIC_ARBPRI) |
                  APIC_REG_MASK(APIC_DFR) |
                  APIC_REG_MASK(APIC_ICR2);
 
    return valid_reg_mask;
}

Here is the call graph for this function:

Here is the caller graph for this function:

kvm_lapic_reset()

void kvm_lapic_reset	(	struct kvm_vcpu *	vcpu,
		bool	init_event
	)

Definition at line 2669 of file lapic.c.

{
    struct kvm_lapic *apic = vcpu->arch.apic;
    u64 msr_val;
    int i;
 
    static_call_cond(kvm_x86_apicv_pre_state_restore)(vcpu);
 
    if (!init_event) {
        msr_val = APIC_DEFAULT_PHYS_BASE | MSR_IA32_APICBASE_ENABLE;
        if (kvm_vcpu_is_reset_bsp(vcpu))
            msr_val |= MSR_IA32_APICBASE_BSP;
        kvm_lapic_set_base(vcpu, msr_val);
    }
 
    if (!apic)
        return;
 
    /* Stop the timer in case it's a reset to an active apic */
    hrtimer_cancel(&apic->lapic_timer.timer);
 
    /* The xAPIC ID is set at RESET even if the APIC was already enabled. */
    if (!init_event)
        kvm_apic_set_xapic_id(apic, vcpu->vcpu_id);
    kvm_apic_set_version(apic->vcpu);
 
    for (i = 0; i < apic->nr_lvt_entries; i++)
        kvm_lapic_set_reg(apic, APIC_LVTx(i), APIC_LVT_MASKED);
    apic_update_lvtt(apic);
    if (kvm_vcpu_is_reset_bsp(vcpu) &&
        kvm_check_has_quirk(vcpu->kvm, KVM_X86_QUIRK_LINT0_REENABLED))
        kvm_lapic_set_reg(apic, APIC_LVT0,
                 SET_APIC_DELIVERY_MODE(0, APIC_MODE_EXTINT));
    apic_manage_nmi_watchdog(apic, kvm_lapic_get_reg(apic, APIC_LVT0));
 
    kvm_apic_set_dfr(apic, 0xffffffffU);
    apic_set_spiv(apic, 0xff);
    kvm_lapic_set_reg(apic, APIC_TASKPRI, 0);
    if (!apic_x2apic_mode(apic))
        kvm_apic_set_ldr(apic, 0);
    kvm_lapic_set_reg(apic, APIC_ESR, 0);
    if (!apic_x2apic_mode(apic)) {
        kvm_lapic_set_reg(apic, APIC_ICR, 0);
        kvm_lapic_set_reg(apic, APIC_ICR2, 0);
    } else {
        kvm_lapic_set_reg64(apic, APIC_ICR, 0);
    }
    kvm_lapic_set_reg(apic, APIC_TDCR, 0);
    kvm_lapic_set_reg(apic, APIC_TMICT, 0);
    for (i = 0; i < 8; i++) {
        kvm_lapic_set_reg(apic, APIC_IRR + 0x10 * i, 0);
        kvm_lapic_set_reg(apic, APIC_ISR + 0x10 * i, 0);
        kvm_lapic_set_reg(apic, APIC_TMR + 0x10 * i, 0);
    }
    kvm_apic_update_apicv(vcpu);
    update_divide_count(apic);
    atomic_set(&apic->lapic_timer.pending, 0);
 
    vcpu->arch.pv_eoi.msr_val = 0;
    apic_update_ppr(apic);
    if (apic->apicv_active) {
        static_call_cond(kvm_x86_apicv_post_state_restore)(vcpu);
        static_call_cond(kvm_x86_hwapic_irr_update)(vcpu, -1);
        static_call_cond(kvm_x86_hwapic_isr_update)(-1);
    }
 
    vcpu->arch.apic_arb_prio = 0;
    vcpu->arch.apic_attention = 0;
 
    kvm_recalculate_apic_map(vcpu->kvm);
}

Here is the call graph for this function:

Here is the caller graph for this function:

kvm_lapic_restart_hv_timer()

void kvm_lapic_restart_hv_timer

(

struct kvm_vcpu *

vcpu

)

Definition at line 2208 of file lapic.c.

{
    struct kvm_lapic *apic = vcpu->arch.apic;
 
    WARN_ON(!apic->lapic_timer.hv_timer_in_use);
    restart_apic_timer(apic);
}

Here is the call graph for this function:

Here is the caller graph for this function:

kvm_lapic_set_base()

void kvm_lapic_set_base	(	struct kvm_vcpu *	vcpu,
		u64	value
	)

Definition at line 2530 of file lapic.c.

{
    u64 old_value = vcpu->arch.apic_base;
    struct kvm_lapic *apic = vcpu->arch.apic;
 
    vcpu->arch.apic_base = value;
 
    if ((old_value ^ value) & MSR_IA32_APICBASE_ENABLE)
        kvm_update_cpuid_runtime(vcpu);
 
    if (!apic)
        return;
 
    /* update jump label if enable bit changes */
    if ((old_value ^ value) & MSR_IA32_APICBASE_ENABLE) {
        if (value & MSR_IA32_APICBASE_ENABLE) {
            kvm_apic_set_xapic_id(apic, vcpu->vcpu_id);
            static_branch_slow_dec_deferred(&apic_hw_disabled);
            /* Check if there are APF page ready requests pending */
            kvm_make_request(KVM_REQ_APF_READY, vcpu);
        } else {
            static_branch_inc(&apic_hw_disabled.key);
            atomic_set_release(&apic->vcpu->kvm->arch.apic_map_dirty, DIRTY);
        }
    }
 
    if ((old_value ^ value) & X2APIC_ENABLE) {
        if (value & X2APIC_ENABLE)
            kvm_apic_set_x2apic_id(apic, vcpu->vcpu_id);
        else if (value & MSR_IA32_APICBASE_ENABLE)
            kvm_apic_set_xapic_id(apic, vcpu->vcpu_id);
    }
 
    if ((old_value ^ value) & (MSR_IA32_APICBASE_ENABLE | X2APIC_ENABLE)) {
        kvm_make_request(KVM_REQ_APICV_UPDATE, vcpu);
        static_call_cond(kvm_x86_set_virtual_apic_mode)(vcpu);
    }
 
    apic->base_address = apic->vcpu->arch.apic_base &
                 MSR_IA32_APICBASE_BASE;
 
    if ((value & MSR_IA32_APICBASE_ENABLE) &&
         apic->base_address != APIC_DEFAULT_PHYS_BASE) {
        kvm_set_apicv_inhibit(apic->vcpu->kvm,
                      APICV_INHIBIT_REASON_APIC_BASE_MODIFIED);
    }
}

Here is the call graph for this function:

Here is the caller graph for this function:

kvm_lapic_set_eoi()

void kvm_lapic_set_eoi

(

struct kvm_vcpu *

vcpu

)

Definition at line 2439 of file lapic.c.

{
    kvm_lapic_reg_write(vcpu->arch.apic, APIC_EOI, 0);
}

Here is the call graph for this function:

Here is the caller graph for this function:

kvm_lapic_set_irr()

static void kvm_lapic_set_irr ( int  vec, struct kvm_lapic *  apic  )

inlinestatic

Definition at line 164 of file lapic.h.

{
    kvm_lapic_set_vector(vec, apic->regs + APIC_IRR);
    /*
     * irr_pending must be true if any interrupt is pending; set it after
     * APIC_IRR to avoid race with apic_clear_irr
     */
    apic->irr_pending = true;
}

Here is the call graph for this function:

Here is the caller graph for this function:

kvm_lapic_set_pv_eoi()

int kvm_lapic_set_pv_eoi	(	struct kvm_vcpu *	vcpu,
		u64	data,
		unsigned long	len
	)

Definition at line 3237 of file lapic.c.

{
    u64 addr = data & ~KVM_MSR_ENABLED;
    struct gfn_to_hva_cache *ghc = &vcpu->arch.pv_eoi.data;
    unsigned long new_len;
    int ret;
 
    if (!IS_ALIGNED(addr, 4))
        return 1;
 
    if (data & KVM_MSR_ENABLED) {
        if (addr == ghc->gpa && len <= ghc->len)
            new_len = ghc->len;
        else
            new_len = len;
 
        ret = kvm_gfn_to_hva_cache_init(vcpu->kvm, ghc, addr, new_len);
        if (ret)
            return ret;
    }
 
    vcpu->arch.pv_eoi.msr_val = data;
 
    return 0;
}

Here is the call graph for this function:

Here is the caller graph for this function:

kvm_lapic_set_tpr()

void kvm_lapic_set_tpr	(	struct kvm_vcpu *	vcpu,
		unsigned long	cr8
	)

Definition at line 2516 of file lapic.c.

{
    apic_set_tpr(vcpu->arch.apic, (cr8 & 0x0f) << 4);
}

Here is the call graph for this function:

Here is the caller graph for this function:

kvm_lapic_set_vapic_addr()

int kvm_lapic_set_vapic_addr	(	struct kvm_vcpu *	vcpu,
		gpa_t	vapic_addr
	)

Definition at line 3139 of file lapic.c.

{
    if (vapic_addr) {
        if (kvm_gfn_to_hva_cache_init(vcpu->kvm,
                    &vcpu->arch.apic->vapic_cache,
                    vapic_addr, sizeof(u32)))
            return -EINVAL;
        __set_bit(KVM_APIC_CHECK_VAPIC, &vcpu->arch.apic_attention);
    } else {
        __clear_bit(KVM_APIC_CHECK_VAPIC, &vcpu->arch.apic_attention);
    }
 
    vcpu->arch.apic->vapic_addr = vapic_addr;
    return 0;
}

Here is the call graph for this function:

Here is the caller graph for this function:

kvm_lapic_set_vector()

static void kvm_lapic_set_vector ( int  vec, void *  bitmap  )

inlinestatic

Definition at line 159 of file lapic.h.

{
    set_bit(VEC_POS(vec), (bitmap) + REG_POS(vec));
}

Here is the caller graph for this function:

kvm_lapic_switch_to_hv_timer()

void kvm_lapic_switch_to_hv_timer

(

struct kvm_vcpu *

vcpu

)

Definition at line 2192 of file lapic.c.

{
    restart_apic_timer(vcpu->arch.apic);
}

Here is the call graph for this function:

Here is the caller graph for this function:

kvm_lapic_switch_to_sw_timer()

void kvm_lapic_switch_to_sw_timer

(

struct kvm_vcpu *

vcpu

)

Definition at line 2197 of file lapic.c.

{
    struct kvm_lapic *apic = vcpu->arch.apic;
 
    preempt_disable();
    /* Possibly the TSC deadline timer is not enabled yet */
    if (apic->lapic_timer.hv_timer_in_use)
        start_sw_timer(apic);
    preempt_enable();
}

Here is the call graph for this function:

Here is the caller graph for this function:

kvm_lapic_sync_from_vapic()

void kvm_lapic_sync_from_vapic

(

struct kvm_vcpu *

vcpu

)

Definition at line 3072 of file lapic.c.

{
    u32 data;
 
    if (test_bit(KVM_APIC_PV_EOI_PENDING, &vcpu->arch.apic_attention))
        apic_sync_pv_eoi_from_guest(vcpu, vcpu->arch.apic);
 
    if (!test_bit(KVM_APIC_CHECK_VAPIC, &vcpu->arch.apic_attention))
        return;
 
    if (kvm_read_guest_cached(vcpu->kvm, &vcpu->arch.apic->vapic_cache, &data,
                  sizeof(u32)))
        return;
 
    apic_set_tpr(vcpu->arch.apic, data & 0xff);
}

Here is the call graph for this function:

Here is the caller graph for this function:

kvm_lapic_sync_to_vapic()

void kvm_lapic_sync_to_vapic

(

struct kvm_vcpu *

vcpu

)

Definition at line 3115 of file lapic.c.

{
    u32 data, tpr;
    int max_irr, max_isr;
    struct kvm_lapic *apic = vcpu->arch.apic;
 
    apic_sync_pv_eoi_to_guest(vcpu, apic);
 
    if (!test_bit(KVM_APIC_CHECK_VAPIC, &vcpu->arch.apic_attention))
        return;
 
    tpr = kvm_lapic_get_reg(apic, APIC_TASKPRI) & 0xff;
    max_irr = apic_find_highest_irr(apic);
    if (max_irr < 0)
        max_irr = 0;
    max_isr = apic_find_highest_isr(apic);
    if (max_isr < 0)
        max_isr = 0;
    data = (tpr & 0xff) | ((max_isr & 0xf0) << 8) | (max_irr << 24);
 
    kvm_write_guest_cached(vcpu->kvm, &vcpu->arch.apic->vapic_cache, &data,
                sizeof(u32));
}

Here is the call graph for this function:

Here is the caller graph for this function:

kvm_lowest_prio_delivery()

static bool kvm_lowest_prio_delivery ( struct kvm_lapic_irq *  irq )

inlinestatic

Definition at line 242 of file lapic.h.

{
    return (irq->delivery_mode == APIC_DM_LOWEST ||
            irq->msi_redir_hint);
}

Here is the caller graph for this function:

kvm_recalculate_apic_map()

void kvm_recalculate_apic_map

(

struct kvm *

kvm

)

Definition at line 374 of file lapic.c.

{
    struct kvm_apic_map *new, *old = NULL;
    struct kvm_vcpu *vcpu;
    unsigned long i;
    u32 max_id = 255; /* enough space for any xAPIC ID */
    bool xapic_id_mismatch;
    int r;
 
    /* Read kvm->arch.apic_map_dirty before kvm->arch.apic_map.  */
    if (atomic_read_acquire(&kvm->arch.apic_map_dirty) == CLEAN)
        return;
 
    WARN_ONCE(!irqchip_in_kernel(kvm),
          "Dirty APIC map without an in-kernel local APIC");
 
    mutex_lock(&kvm->arch.apic_map_lock);
 
retry:
    /*
     * Read kvm->arch.apic_map_dirty before kvm->arch.apic_map (if clean)
     * or the APIC registers (if dirty).  Note, on retry the map may have
     * not yet been marked dirty by whatever task changed a vCPU's x2APIC
     * ID, i.e. the map may still show up as in-progress.  In that case
     * this task still needs to retry and complete its calculation.
     */
    if (atomic_cmpxchg_acquire(&kvm->arch.apic_map_dirty,
                   DIRTY, UPDATE_IN_PROGRESS) == CLEAN) {
        /* Someone else has updated the map. */
        mutex_unlock(&kvm->arch.apic_map_lock);
        return;
    }
 
    /*
     * Reset the mismatch flag between attempts so that KVM does the right
     * thing if a vCPU changes its xAPIC ID, but do NOT reset max_id, i.e.
     * keep max_id strictly increasing.  Disallowing max_id from shrinking
     * ensures KVM won't get stuck in an infinite loop, e.g. if the vCPU
     * with the highest x2APIC ID is toggling its APIC on and off.
     */
    xapic_id_mismatch = false;
 
    kvm_for_each_vcpu(i, vcpu, kvm)
        if (kvm_apic_present(vcpu))
            max_id = max(max_id, kvm_x2apic_id(vcpu->arch.apic));
 
    new = kvzalloc(sizeof(struct kvm_apic_map) +
                       sizeof(struct kvm_lapic *) * ((u64)max_id + 1),
               GFP_KERNEL_ACCOUNT);
 
    if (!new)
        goto out;
 
    new->max_apic_id = max_id;
    new->logical_mode = KVM_APIC_MODE_SW_DISABLED;
 
    kvm_for_each_vcpu(i, vcpu, kvm) {
        if (!kvm_apic_present(vcpu))
            continue;
 
        r = kvm_recalculate_phys_map(new, vcpu, &xapic_id_mismatch);
        if (r) {
            kvfree(new);
            new = NULL;
            if (r == -E2BIG) {
                cond_resched();
                goto retry;
            }
 
            goto out;
        }
 
        kvm_recalculate_logical_map(new, vcpu);
    }
out:
    /*
     * The optimized map is effectively KVM's internal version of APICv,
     * and all unwanted aliasing that results in disabling the optimized
     * map also applies to APICv.
     */
    if (!new)
        kvm_set_apicv_inhibit(kvm, APICV_INHIBIT_REASON_PHYSICAL_ID_ALIASED);
    else
        kvm_clear_apicv_inhibit(kvm, APICV_INHIBIT_REASON_PHYSICAL_ID_ALIASED);
 
    if (!new || new->logical_mode == KVM_APIC_MODE_MAP_DISABLED)
        kvm_set_apicv_inhibit(kvm, APICV_INHIBIT_REASON_LOGICAL_ID_ALIASED);
    else
        kvm_clear_apicv_inhibit(kvm, APICV_INHIBIT_REASON_LOGICAL_ID_ALIASED);
 
    if (xapic_id_mismatch)
        kvm_set_apicv_inhibit(kvm, APICV_INHIBIT_REASON_APIC_ID_MODIFIED);
    else
        kvm_clear_apicv_inhibit(kvm, APICV_INHIBIT_REASON_APIC_ID_MODIFIED);
 
    old = rcu_dereference_protected(kvm->arch.apic_map,
            lockdep_is_held(&kvm->arch.apic_map_lock));
    rcu_assign_pointer(kvm->arch.apic_map, new);
    /*
     * Write kvm->arch.apic_map before clearing apic->apic_map_dirty.
     * If another update has come in, leave it DIRTY.
     */
    atomic_cmpxchg_release(&kvm->arch.apic_map_dirty,
                   UPDATE_IN_PROGRESS, CLEAN);
    mutex_unlock(&kvm->arch.apic_map_lock);
 
    if (old)
        call_rcu(&old->rcu, kvm_apic_map_free);
 
    kvm_make_scan_ioapic_request(kvm);
}

Here is the call graph for this function:

Here is the caller graph for this function:

kvm_set_apic_base()

int kvm_set_apic_base	(	struct kvm_vcpu *	vcpu,
		struct msr_data *	msr_info
	)

Definition at line 485 of file x86.c.

{
    enum lapic_mode old_mode = kvm_get_apic_mode(vcpu);
    enum lapic_mode new_mode = kvm_apic_mode(msr_info->data);
    u64 reserved_bits = kvm_vcpu_reserved_gpa_bits_raw(vcpu) | 0x2ff |
        (guest_cpuid_has(vcpu, X86_FEATURE_X2APIC) ? 0 : X2APIC_ENABLE);
 
    if ((msr_info->data & reserved_bits) != 0 || new_mode == LAPIC_MODE_INVALID)
        return 1;
    if (!msr_info->host_initiated) {
        if (old_mode == LAPIC_MODE_X2APIC && new_mode == LAPIC_MODE_XAPIC)
            return 1;
        if (old_mode == LAPIC_MODE_DISABLED && new_mode == LAPIC_MODE_X2APIC)
            return 1;
    }
 
    kvm_lapic_set_base(vcpu, msr_info->data);
    kvm_recalculate_apic_map(vcpu->kvm);
    return 0;
}

Here is the call graph for this function:

Here is the caller graph for this function:

kvm_set_lapic_tscdeadline_msr()

void kvm_set_lapic_tscdeadline_msr	(	struct kvm_vcpu *	vcpu,
		u64	data
	)

Definition at line 2504 of file lapic.c.

{
    struct kvm_lapic *apic = vcpu->arch.apic;
 
    if (!kvm_apic_present(vcpu) || !apic_lvtt_tscdeadline(apic))
        return;
 
    hrtimer_cancel(&apic->lapic_timer.timer);
    apic->lapic_timer.tscdeadline = data;
    start_apic_timer(apic);
}

Here is the call graph for this function:

Here is the caller graph for this function:

kvm_vcpu_apicv_active()

static bool kvm_vcpu_apicv_active ( struct kvm_vcpu *  vcpu )

inlinestatic

Definition at line 226 of file lapic.h.

{
    return lapic_in_kernel(vcpu) && vcpu->arch.apic->apicv_active;
}

Here is the call graph for this function:

Here is the caller graph for this function:

kvm_vector_to_index()

int kvm_vector_to_index	(	u32	vector,
		u32	dest_vcpus,
		const unsigned long *	bitmap,
		u32	bitmap_size
	)

Definition at line 1092 of file lapic.c.

{
    u32 mod;
    int i, idx = -1;
 
    mod = vector % dest_vcpus;
 
    for (i = 0; i <= mod; i++) {
        idx = find_next_bit(bitmap, bitmap_size, idx + 1);
        BUG_ON(idx == bitmap_size);
    }
 
    return idx;
}

Here is the caller graph for this function:

kvm_wait_lapic_expire()

void kvm_wait_lapic_expire

(

struct kvm_vcpu *

vcpu

)

Definition at line 1869 of file lapic.c.

{
    if (lapic_in_kernel(vcpu) &&
        vcpu->arch.apic->lapic_timer.expired_tscdeadline &&
        vcpu->arch.apic->lapic_timer.timer_advance_ns &&
        lapic_timer_int_injected(vcpu))
        __kvm_wait_lapic_expire(vcpu);
}

Here is the call graph for this function:

Here is the caller graph for this function:

kvm_x2apic_icr_write()

int kvm_x2apic_icr_write	(	struct kvm_lapic *	apic,
		u64	data
	)

Definition at line 3155 of file lapic.c.

{
    data &= ~APIC_ICR_BUSY;
 
    kvm_apic_send_ipi(apic, (u32)data, (u32)(data >> 32));
    kvm_lapic_set_reg64(apic, APIC_ICR, data);
    trace_kvm_apic_write(APIC_ICR, data);
    return 0;
}

Here is the call graph for this function:

Here is the caller graph for this function:

kvm_x2apic_msr_read()

int kvm_x2apic_msr_read	(	struct kvm_vcpu *	vcpu,
		u32	msr,
		u64 *	data
	)

Definition at line 3210 of file lapic.c.

{
    struct kvm_lapic *apic = vcpu->arch.apic;
    u32 reg = (msr - APIC_BASE_MSR) << 4;
 
    if (!lapic_in_kernel(vcpu) || !apic_x2apic_mode(apic))
        return 1;
 
    return kvm_lapic_msr_read(apic, reg, data);
}

Here is the call graph for this function:

Here is the caller graph for this function:

kvm_x2apic_msr_write()

int kvm_x2apic_msr_write	(	struct kvm_vcpu *	vcpu,
		u32	msr,
		u64	data
	)

Definition at line 3199 of file lapic.c.

{
    struct kvm_lapic *apic = vcpu->arch.apic;
    u32 reg = (msr - APIC_BASE_MSR) << 4;
 
    if (!lapic_in_kernel(vcpu) || !apic_x2apic_mode(apic))
        return 1;
 
    return kvm_lapic_msr_write(apic, reg, data);
}

Here is the call graph for this function:

Here is the caller graph for this function:

kvm_xapic_id()

static u8 kvm_xapic_id ( struct kvm_lapic *  apic )

inlinestatic

Definition at line 276 of file lapic.h.

{
    return kvm_lapic_get_reg(apic, APIC_ID) >> 24;
}

Here is the caller graph for this function:

lapic_in_kernel()

static bool lapic_in_kernel ( struct kvm_vcpu *  vcpu )

inlinestatic

Definition at line 186 of file lapic.h.

{
    if (static_branch_unlikely(&kvm_has_noapic_vcpu))
        return vcpu->arch.apic;
    return true;
}

Variable Documentation

apic_hw_disabled

struct static_key_false_deferred apic_hw_disabled

extern

apic_sw_disabled

struct static_key_false_deferred apic_sw_disabled

extern