915 struct kvm_cpuid_entry2 *entry;
930 entry->eax = min(entry->eax, 0x1fU);
952 WARN_ON_ONCE((entry->eax & 0xff) > 1);
961 for (i = 1; entry->eax & 0x1f; ++i) {
975 max_idx = entry->eax = min(entry->eax, 2u);
1003 union cpuid10_eax eax;
1004 union cpuid10_edx edx;
1006 if (!
enable_pmu || !static_cpu_has(X86_FEATURE_ARCH_PERFMON)) {
1007 entry->eax = entry->ebx = entry->ecx = entry->edx = 0;
1012 eax.split.num_counters =
kvm_pmu_cap.num_counters_gp;
1014 eax.split.mask_length =
kvm_pmu_cap.events_mask_len;
1015 edx.split.num_counters_fixed =
kvm_pmu_cap.num_counters_fixed;
1016 edx.split.bit_width_fixed =
kvm_pmu_cap.bit_width_fixed;
1019 edx.split.anythread_deprecated = 1;
1020 edx.split.reserved1 = 0;
1021 edx.split.reserved2 = 0;
1023 entry->eax = eax.full;
1026 entry->edx = edx.full;
1035 entry->eax = entry->ebx = entry->ecx = 0;
1041 entry->eax &= permitted_xcr0;
1043 entry->ecx = entry->ebx;
1044 entry->edx &= permitted_xcr0 >> 32;
1045 if (!permitted_xcr0)
1053 if (entry->eax & (
F(XSAVES)|
F(XSAVEC)))
1057 WARN_ON_ONCE(permitted_xss != 0);
1060 entry->ecx &= permitted_xss;
1061 entry->edx &= permitted_xss >> 32;
1063 for (i = 2; i < 64; ++i) {
1065 if (permitted_xcr0 & BIT_ULL(i))
1067 else if (permitted_xss & BIT_ULL(i))
1084 if (WARN_ON_ONCE(!entry->eax || (entry->ecx & 0x1) != s_state)) {
1090 entry->ecx &= ~BIT_ULL(2);
1098 entry->eax = entry->ebx = entry->ecx = entry->edx = 0;
1109 entry->ebx &= SGX_MISC_EXINFO;
1122 entry->eax &= SGX_ATTR_PRIV_MASK | SGX_ATTR_UNPRIV_MASK;
1128 entry->eax = entry->ebx = entry->ecx = entry->edx = 0;
1132 for (i = 1, max_idx = entry->eax; i <= max_idx; ++i) {
1140 entry->eax = entry->ebx = entry->ecx = entry->edx = 0;
1144 for (i = 1, max_idx = entry->eax; i <= max_idx; ++i) {
1151 entry->eax = entry->ebx = entry->ecx = entry->edx = 0;
1155 case KVM_CPUID_SIGNATURE: {
1156 const u32 *sigptr = (
const u32 *)KVM_SIGNATURE;
1157 entry->eax = KVM_CPUID_FEATURES;
1158 entry->ebx = sigptr[0];
1159 entry->ecx = sigptr[1];
1160 entry->edx = sigptr[2];
1163 case KVM_CPUID_FEATURES:
1164 entry->eax = (1 << KVM_FEATURE_CLOCKSOURCE) |
1165 (1 << KVM_FEATURE_NOP_IO_DELAY) |
1166 (1 << KVM_FEATURE_CLOCKSOURCE2) |
1167 (1 << KVM_FEATURE_ASYNC_PF) |
1168 (1 << KVM_FEATURE_PV_EOI) |
1169 (1 << KVM_FEATURE_CLOCKSOURCE_STABLE_BIT) |
1170 (1 << KVM_FEATURE_PV_UNHALT) |
1171 (1 << KVM_FEATURE_PV_TLB_FLUSH) |
1172 (1 << KVM_FEATURE_ASYNC_PF_VMEXIT) |
1173 (1 << KVM_FEATURE_PV_SEND_IPI) |
1174 (1 << KVM_FEATURE_POLL_CONTROL) |
1175 (1 << KVM_FEATURE_PV_SCHED_YIELD) |
1176 (1 << KVM_FEATURE_ASYNC_PF_INT);
1178 if (sched_info_on())
1179 entry->eax |= (1 << KVM_FEATURE_STEAL_TIME);
1186 entry->eax = min(entry->eax, 0x80000022);
1200 if (entry->eax >= 0x8000001d &&
1201 (static_cpu_has(X86_FEATURE_LFENCE_RDTSC)
1202 || !static_cpu_has_bug(X86_BUG_NULL_SEG)))
1203 entry->eax = max(entry->eax, 0x80000021);
1206 entry->ebx &= ~GENMASK(27, 16);
1215 entry->edx &= ~GENMASK(17, 16);
1221 entry->edx &= boot_cpu_data.x86_power;
1222 entry->eax = entry->ebx = entry->ecx = 0;
1225 unsigned g_phys_as = (entry->eax >> 16) & 0xff;
1226 unsigned virt_as = max((entry->eax >> 8) & 0xff, 48U);
1227 unsigned phys_as = entry->eax & 0xff;
1240 g_phys_as = boot_cpu_data.x86_phys_bits;
1241 else if (!g_phys_as)
1242 g_phys_as = phys_as;
1244 entry->eax = g_phys_as | (virt_as << 8);
1245 entry->ecx &= ~(GENMASK(31, 16) | GENMASK(11, 8));
1252 entry->eax = entry->ebx = entry->ecx = entry->edx = 0;
1262 entry->ecx = entry->edx = 0;
1265 entry->eax &= GENMASK(2, 0);
1266 entry->ebx = entry->ecx = entry->edx = 0;
1270 entry->eax = entry->ebx = entry->ecx = 0;
1275 entry->eax = entry->ebx = entry->ecx = entry->edx = 0;
1279 entry->ebx &= ~GENMASK(31, 12);
1284 entry->ebx &= ~GENMASK(11, 6);
1288 entry->eax = entry->ebx = entry->ecx = entry->edx = 0;
1291 entry->ebx = entry->ecx = entry->edx = 0;
1296 union cpuid_0x80000022_ebx ebx;
1298 entry->ecx = entry->edx = 0;
1300 entry->eax = entry->ebx;
1307 ebx.split.num_core_pmc =
kvm_pmu_cap.num_counters_gp;
1309 ebx.split.num_core_pmc = AMD64_NUM_COUNTERS_CORE;
1311 ebx.split.num_core_pmc = AMD64_NUM_COUNTERS;
1313 entry->ebx = ebx.full;
1319 entry->eax = min(entry->eax, 0xC0000004);
1330 entry->eax = entry->ebx = entry->ecx = entry->edx = 0;
u32 xstate_required_size(u64 xstate_bv, bool compacted)
static struct kvm_cpuid_entry2 * do_host_cpuid(struct kvm_cpuid_array *array, u32 function, u32 index)
static __always_inline bool kvm_cpu_cap_has(unsigned int x86_feature)
static __always_inline void cpuid_entry_override(struct kvm_cpuid_entry2 *entry, unsigned int leaf)
struct x86_pmu_capability __read_mostly kvm_pmu_cap
bool __read_mostly enable_pmu
static u64 kvm_get_filtered_xcr0(void)