#include <linux/bitfield.h>
#include <linux/bsearch.h>
#include <linux/cacheinfo.h>
#include <linux/kvm_host.h>
#include <linux/mm.h>
#include <linux/printk.h>
#include <linux/uaccess.h>
#include <asm/cacheflush.h>
#include <asm/cputype.h>
#include <asm/debug-monitors.h>
#include <asm/esr.h>
#include <asm/kvm_arm.h>
#include <asm/kvm_emulate.h>
#include <asm/kvm_hyp.h>
#include <asm/kvm_mmu.h>
#include <asm/kvm_nested.h>
#include <asm/perf_event.h>
#include <asm/sysreg.h>
#include <trace/events/kvm.h>
#include "sys_regs.h"
#include "trace.h"

Include dependency graph for sys_regs.c:

Macros
#define	PURE_EL2_SYSREG(el2)

#define	MAPPED_EL2_SYSREG(el2, el1, fn)

#define	CSSELR_MAX 14

#define	DBG_BCR_BVR_WCR_WVR_EL1(n)

#define	PMU_SYS_REG(name)

#define	PMU_PMEVCNTR_EL0(n)

#define	PMU_PMEVTYPER_EL0(n)

#define	AMU_AMEVCNTR0_EL0(n) { SYS_DESC(SYS_AMEVCNTR0_EL0(n)), undef_access }

#define	AMU_AMEVTYPER0_EL0(n) { SYS_DESC(SYS_AMEVTYPER0_EL0(n)), undef_access }

#define	AMU_AMEVCNTR1_EL0(n) { SYS_DESC(SYS_AMEVCNTR1_EL0(n)), undef_access }

#define	AMU_AMEVTYPER1_EL0(n) { SYS_DESC(SYS_AMEVTYPER1_EL0(n)), undef_access }

#define	__PTRAUTH_KEY(k)

#define	PTRAUTH_KEY(k)

#define	ID_REG_LIMIT_FIELD_ENUM(val, reg, field, limit)

#define	MTE_REG(name)

#define	EL2_REG(name, acc, rst, v)

#define	EL2_REG_VNCR(name, rst, v) EL2_REG(name, bad_vncr_trap, rst, v)

#define	EL2_REG_REDIR(name, rst, v) EL2_REG(name, bad_redir_trap, rst, v)

#define	EL12_REG(name, acc, rst, v)

#define	ID_DESC(name)

#define	ID_SANITISED(name)

#define	AA32_ID_SANITISED(name)

#define	ID_WRITABLE(name, mask)

#define	ID_UNALLOCATED(crm, op2)

#define	ID_HIDDEN(name)

#define	DBG_BCR_BVR_WCR_WVR(n)

#define	DBGBXVR(n) { AA32(HI), Op1( 0), CRn( 1), CRm((n)), Op2( 1), trap_bvr, NULL, n }

#define	CP15_PMU_SYS_REG(_map, _Op1, _CRn, _CRm, _Op2)

#define	PMU_PMEVCNTR(n)

#define	PMU_PMEVTYPER(n)

#define	FUNCTION_INVARIANT(reg)

#define	KVM_ARM_FEATURE_ID_RANGE_INDEX(r)

Functions
static u64	sys_reg_to_index (const struct sys_reg_desc *reg)

static int	set_id_reg (struct kvm_vcpu vcpu, const struct sys_reg_desc rd, u64 val)

static bool	bad_trap (struct kvm_vcpu vcpu, struct sys_reg_params params, const struct sys_reg_desc r, const char msg)

static bool	read_from_write_only (struct kvm_vcpu vcpu, struct sys_reg_params params, const struct sys_reg_desc *r)

static bool	write_to_read_only (struct kvm_vcpu vcpu, struct sys_reg_params params, const struct sys_reg_desc *r)

static bool	get_el2_to_el1_mapping (unsigned int reg, unsigned int el1r, u64(*xlate)(u64))

u64	vcpu_read_sys_reg (const struct kvm_vcpu *vcpu, int reg)

void	vcpu_write_sys_reg (struct kvm_vcpu *vcpu, u64 val, int reg)

static u8	get_min_cache_line_size (bool icache)

static u32	get_ccsidr (struct kvm_vcpu *vcpu, u32 csselr)

static int	set_ccsidr (struct kvm_vcpu *vcpu, u32 csselr, u32 val)

static bool	access_rw (struct kvm_vcpu vcpu, struct sys_reg_params p, const struct sys_reg_desc *r)

static bool	access_dcsw (struct kvm_vcpu vcpu, struct sys_reg_params p, const struct sys_reg_desc *r)

static bool	access_dcgsw (struct kvm_vcpu vcpu, struct sys_reg_params p, const struct sys_reg_desc *r)

static void	get_access_mask (const struct sys_reg_desc r, u64 mask, u64 *shift)

static bool	access_vm_reg (struct kvm_vcpu vcpu, struct sys_reg_params p, const struct sys_reg_desc *r)

static bool	access_actlr (struct kvm_vcpu vcpu, struct sys_reg_params p, const struct sys_reg_desc *r)

static bool	access_gic_sgi (struct kvm_vcpu vcpu, struct sys_reg_params p, const struct sys_reg_desc *r)

static bool	access_gic_sre (struct kvm_vcpu vcpu, struct sys_reg_params p, const struct sys_reg_desc *r)

static bool	trap_raz_wi (struct kvm_vcpu vcpu, struct sys_reg_params p, const struct sys_reg_desc *r)

static bool	trap_undef (struct kvm_vcpu vcpu, struct sys_reg_params p, const struct sys_reg_desc *r)

static bool	trap_loregion (struct kvm_vcpu vcpu, struct sys_reg_params p, const struct sys_reg_desc *r)

static bool	trap_oslar_el1 (struct kvm_vcpu vcpu, struct sys_reg_params p, const struct sys_reg_desc *r)

static bool	trap_oslsr_el1 (struct kvm_vcpu vcpu, struct sys_reg_params p, const struct sys_reg_desc *r)

static int	set_oslsr_el1 (struct kvm_vcpu vcpu, const struct sys_reg_desc rd, u64 val)

static bool	trap_dbgauthstatus_el1 (struct kvm_vcpu vcpu, struct sys_reg_params p, const struct sys_reg_desc *r)

static bool	trap_debug_regs (struct kvm_vcpu vcpu, struct sys_reg_params p, const struct sys_reg_desc *r)

static void	reg_to_dbg (struct kvm_vcpu vcpu, struct sys_reg_params p, const struct sys_reg_desc rd, u64 dbg_reg)

static void	dbg_to_reg (struct kvm_vcpu vcpu, struct sys_reg_params p, const struct sys_reg_desc rd, u64 dbg_reg)

static bool	trap_bvr (struct kvm_vcpu vcpu, struct sys_reg_params p, const struct sys_reg_desc *rd)

static int	set_bvr (struct kvm_vcpu vcpu, const struct sys_reg_desc rd, u64 val)

static int	get_bvr (struct kvm_vcpu vcpu, const struct sys_reg_desc rd, u64 *val)

static u64	reset_bvr (struct kvm_vcpu vcpu, const struct sys_reg_desc rd)

static bool	trap_bcr (struct kvm_vcpu vcpu, struct sys_reg_params p, const struct sys_reg_desc *rd)

static int	set_bcr (struct kvm_vcpu vcpu, const struct sys_reg_desc rd, u64 val)

static int	get_bcr (struct kvm_vcpu vcpu, const struct sys_reg_desc rd, u64 *val)

static u64	reset_bcr (struct kvm_vcpu vcpu, const struct sys_reg_desc rd)

static bool	trap_wvr (struct kvm_vcpu vcpu, struct sys_reg_params p, const struct sys_reg_desc *rd)

static int	set_wvr (struct kvm_vcpu vcpu, const struct sys_reg_desc rd, u64 val)

static int	get_wvr (struct kvm_vcpu vcpu, const struct sys_reg_desc rd, u64 *val)

static u64	reset_wvr (struct kvm_vcpu vcpu, const struct sys_reg_desc rd)

static bool	trap_wcr (struct kvm_vcpu vcpu, struct sys_reg_params p, const struct sys_reg_desc *rd)

static int	set_wcr (struct kvm_vcpu vcpu, const struct sys_reg_desc rd, u64 val)

static int	get_wcr (struct kvm_vcpu vcpu, const struct sys_reg_desc rd, u64 *val)

static u64	reset_wcr (struct kvm_vcpu vcpu, const struct sys_reg_desc rd)

static u64	reset_amair_el1 (struct kvm_vcpu vcpu, const struct sys_reg_desc r)

static u64	reset_actlr (struct kvm_vcpu vcpu, const struct sys_reg_desc r)

static u64	reset_mpidr (struct kvm_vcpu vcpu, const struct sys_reg_desc r)

static unsigned int	pmu_visibility (const struct kvm_vcpu vcpu, const struct sys_reg_desc r)

static u64	reset_pmu_reg (struct kvm_vcpu vcpu, const struct sys_reg_desc r)

static u64	reset_pmevcntr (struct kvm_vcpu vcpu, const struct sys_reg_desc r)

static u64	reset_pmevtyper (struct kvm_vcpu vcpu, const struct sys_reg_desc r)

static u64	reset_pmselr (struct kvm_vcpu vcpu, const struct sys_reg_desc r)

static u64	reset_pmcr (struct kvm_vcpu vcpu, const struct sys_reg_desc r)

static bool	check_pmu_access_disabled (struct kvm_vcpu *vcpu, u64 flags)

static bool	pmu_access_el0_disabled (struct kvm_vcpu *vcpu)

static bool	pmu_write_swinc_el0_disabled (struct kvm_vcpu *vcpu)

static bool	pmu_access_cycle_counter_el0_disabled (struct kvm_vcpu *vcpu)

static bool	pmu_access_event_counter_el0_disabled (struct kvm_vcpu *vcpu)

static bool	access_pmcr (struct kvm_vcpu vcpu, struct sys_reg_params p, const struct sys_reg_desc *r)

static bool	access_pmselr (struct kvm_vcpu vcpu, struct sys_reg_params p, const struct sys_reg_desc *r)

static bool	access_pmceid (struct kvm_vcpu vcpu, struct sys_reg_params p, const struct sys_reg_desc *r)

static bool	pmu_counter_idx_valid (struct kvm_vcpu *vcpu, u64 idx)

static int	get_pmu_evcntr (struct kvm_vcpu vcpu, const struct sys_reg_desc r, u64 *val)

static bool	access_pmu_evcntr (struct kvm_vcpu vcpu, struct sys_reg_params p, const struct sys_reg_desc *r)

static bool	access_pmu_evtyper (struct kvm_vcpu vcpu, struct sys_reg_params p, const struct sys_reg_desc *r)

static int	set_pmreg (struct kvm_vcpu vcpu, const struct sys_reg_desc r, u64 val)

static int	get_pmreg (struct kvm_vcpu vcpu, const struct sys_reg_desc r, u64 *val)

static bool	access_pmcnten (struct kvm_vcpu vcpu, struct sys_reg_params p, const struct sys_reg_desc *r)

static bool	access_pminten (struct kvm_vcpu vcpu, struct sys_reg_params p, const struct sys_reg_desc *r)

static bool	access_pmovs (struct kvm_vcpu vcpu, struct sys_reg_params p, const struct sys_reg_desc *r)

static bool	access_pmswinc (struct kvm_vcpu vcpu, struct sys_reg_params p, const struct sys_reg_desc *r)

static bool	access_pmuserenr (struct kvm_vcpu vcpu, struct sys_reg_params p, const struct sys_reg_desc *r)

static int	get_pmcr (struct kvm_vcpu vcpu, const struct sys_reg_desc r, u64 *val)

static int	set_pmcr (struct kvm_vcpu vcpu, const struct sys_reg_desc r, u64 val)

static bool	undef_access (struct kvm_vcpu vcpu, struct sys_reg_params p, const struct sys_reg_desc *r)

static unsigned int	ptrauth_visibility (const struct kvm_vcpu vcpu, const struct sys_reg_desc rd)

static bool	access_arch_timer (struct kvm_vcpu vcpu, struct sys_reg_params p, const struct sys_reg_desc *r)

static s64	kvm_arm64_ftr_safe_value (u32 id, const struct arm64_ftr_bits *ftrp, s64 new, s64 cur)

static int	arm64_check_features (struct kvm_vcpu vcpu, const struct sys_reg_desc rd, u64 val)

static u8	pmuver_to_perfmon (u8 pmuver)

static u64	__kvm_read_sanitised_id_reg (const struct kvm_vcpu vcpu, const struct sys_reg_desc r)

static u64	kvm_read_sanitised_id_reg (struct kvm_vcpu vcpu, const struct sys_reg_desc r)

static u64	read_id_reg (const struct kvm_vcpu vcpu, const struct sys_reg_desc r)

static bool	is_id_reg (u32 id)

static bool	is_aa32_id_reg (u32 id)

static unsigned int	id_visibility (const struct kvm_vcpu vcpu, const struct sys_reg_desc r)

static unsigned int	aa32_id_visibility (const struct kvm_vcpu vcpu, const struct sys_reg_desc r)

static unsigned int	raz_visibility (const struct kvm_vcpu vcpu, const struct sys_reg_desc r)

static bool	access_id_reg (struct kvm_vcpu vcpu, struct sys_reg_params p, const struct sys_reg_desc *r)

static unsigned int	sve_visibility (const struct kvm_vcpu vcpu, const struct sys_reg_desc rd)

static u64	read_sanitised_id_aa64pfr0_el1 (struct kvm_vcpu vcpu, const struct sys_reg_desc rd)

static u64	read_sanitised_id_aa64dfr0_el1 (struct kvm_vcpu vcpu, const struct sys_reg_desc rd)

static int	set_id_aa64dfr0_el1 (struct kvm_vcpu vcpu, const struct sys_reg_desc rd, u64 val)

static u64	read_sanitised_id_dfr0_el1 (struct kvm_vcpu vcpu, const struct sys_reg_desc rd)

static int	set_id_dfr0_el1 (struct kvm_vcpu vcpu, const struct sys_reg_desc rd, u64 val)

static int	get_id_reg (struct kvm_vcpu vcpu, const struct sys_reg_desc rd, u64 *val)

static int	get_raz_reg (struct kvm_vcpu vcpu, const struct sys_reg_desc rd, u64 *val)

static int	set_wi_reg (struct kvm_vcpu vcpu, const struct sys_reg_desc rd, u64 val)

static bool	access_ctr (struct kvm_vcpu vcpu, struct sys_reg_params p, const struct sys_reg_desc *r)

static bool	access_clidr (struct kvm_vcpu vcpu, struct sys_reg_params p, const struct sys_reg_desc *r)

static u64	reset_clidr (struct kvm_vcpu vcpu, const struct sys_reg_desc r)

static int	set_clidr (struct kvm_vcpu vcpu, const struct sys_reg_desc rd, u64 val)

static bool	access_csselr (struct kvm_vcpu vcpu, struct sys_reg_params p, const struct sys_reg_desc *r)

static bool	access_ccsidr (struct kvm_vcpu vcpu, struct sys_reg_params p, const struct sys_reg_desc *r)

static unsigned int	mte_visibility (const struct kvm_vcpu vcpu, const struct sys_reg_desc rd)

static unsigned int	el2_visibility (const struct kvm_vcpu vcpu, const struct sys_reg_desc rd)

static bool	bad_vncr_trap (struct kvm_vcpu vcpu, struct sys_reg_params p, const struct sys_reg_desc *r)

static bool	bad_redir_trap (struct kvm_vcpu vcpu, struct sys_reg_params p, const struct sys_reg_desc *r)

static unsigned int	hidden_user_visibility (const struct kvm_vcpu vcpu, const struct sys_reg_desc rd)

static bool	access_sp_el1 (struct kvm_vcpu vcpu, struct sys_reg_params p, const struct sys_reg_desc *r)

static bool	access_elr (struct kvm_vcpu vcpu, struct sys_reg_params p, const struct sys_reg_desc *r)

static bool	access_spsr (struct kvm_vcpu vcpu, struct sys_reg_params p, const struct sys_reg_desc *r)

static bool	trap_dbgdidr (struct kvm_vcpu vcpu, struct sys_reg_params p, const struct sys_reg_desc *r)

static bool	check_sysreg_table (const struct sys_reg_desc *table, unsigned int n, bool is_32)

int	kvm_handle_cp14_load_store (struct kvm_vcpu *vcpu)

static void	perform_access (struct kvm_vcpu vcpu, struct sys_reg_params params, const struct sys_reg_desc *r)

static bool	emulate_cp (struct kvm_vcpu vcpu, struct sys_reg_params params, const struct sys_reg_desc *table, size_t num)

static void	unhandled_cp_access (struct kvm_vcpu vcpu, struct sys_reg_params params)

static int	kvm_handle_cp_64 (struct kvm_vcpu vcpu, const struct sys_reg_desc global, size_t nr_global)

static bool	emulate_sys_reg (struct kvm_vcpu vcpu, struct sys_reg_params params)

static bool	kvm_esr_cp10_id_to_sys64 (u64 esr, struct sys_reg_params *params)

int	kvm_handle_cp10_id (struct kvm_vcpu *vcpu)

static int	kvm_emulate_cp15_id_reg (struct kvm_vcpu vcpu, struct sys_reg_params params)

static int	kvm_handle_cp_32 (struct kvm_vcpu vcpu, struct sys_reg_params params, const struct sys_reg_desc *global, size_t nr_global)

int	kvm_handle_cp15_64 (struct kvm_vcpu *vcpu)

int	kvm_handle_cp15_32 (struct kvm_vcpu *vcpu)

int	kvm_handle_cp14_64 (struct kvm_vcpu *vcpu)

int	kvm_handle_cp14_32 (struct kvm_vcpu *vcpu)

static bool	is_imp_def_sys_reg (struct sys_reg_params *params)

static void	kvm_reset_id_regs (struct kvm_vcpu *vcpu)

void	kvm_reset_sys_regs (struct kvm_vcpu *vcpu)

int	kvm_handle_sys_reg (struct kvm_vcpu *vcpu)

static bool	index_to_params (u64 id, struct sys_reg_params *params)

const struct sys_reg_desc *	get_reg_by_id (u64 id, const struct sys_reg_desc table[], unsigned int num)

static const struct sys_reg_desc *	id_to_sys_reg_desc (struct kvm_vcpu *vcpu, u64 id, const struct sys_reg_desc table[], unsigned int num)

static u64	get_ctr_el0 (struct kvm_vcpu v, const struct sys_reg_desc r)

static int	get_invariant_sys_reg (u64 id, u64 __user *uaddr)

static int	set_invariant_sys_reg (u64 id, u64 __user *uaddr)

static int	demux_c15_get (struct kvm_vcpu vcpu, u64 id, void __user uaddr)

static int	demux_c15_set (struct kvm_vcpu vcpu, u64 id, void __user uaddr)

int	kvm_sys_reg_get_user (struct kvm_vcpu vcpu, const struct kvm_one_reg reg, const struct sys_reg_desc table[], unsigned int num)

int	kvm_arm_sys_reg_get_reg (struct kvm_vcpu vcpu, const struct kvm_one_reg reg)

int	kvm_sys_reg_set_user (struct kvm_vcpu vcpu, const struct kvm_one_reg reg, const struct sys_reg_desc table[], unsigned int num)

int	kvm_arm_sys_reg_set_reg (struct kvm_vcpu vcpu, const struct kvm_one_reg reg)

static unsigned int	num_demux_regs (void)

static int	write_demux_regids (u64 __user *uindices)

static bool	copy_reg_to_user (const struct sys_reg_desc reg, u64 __user *uind)

static int	walk_one_sys_reg (const struct kvm_vcpu vcpu, const struct sys_reg_desc rd, u64 __user *uind, unsigned int total)

static int	walk_sys_regs (struct kvm_vcpu vcpu, u64 __user uind)

unsigned long	kvm_arm_num_sys_reg_descs (struct kvm_vcpu *vcpu)

int	kvm_arm_copy_sys_reg_indices (struct kvm_vcpu vcpu, u64 __user uindices)

static bool	is_feature_id_reg (u32 encoding)

int	kvm_vm_ioctl_get_reg_writable_masks (struct kvm kvm, struct reg_mask_range range)

int __init	kvm_sys_reg_table_init (void)

Variables
static const struct sys_reg_desc	sys_reg_descs []

static const struct sys_reg_desc *	first_idreg

static const struct sys_reg_desc	cp14_regs []

static const struct sys_reg_desc	cp14_64_regs []

static const struct sys_reg_desc	cp15_regs []

static const struct sys_reg_desc	cp15_64_regs []

static struct sys_reg_desc invariant_sys_regs[]	__ro_after_init

Macro Definition Documentation

◆ __PTRAUTH_KEY

#define __PTRAUTH_KEY ( k )

Value:

{ SYS_DESC(SYS_## k), undef_access, reset_unknown, k, \

.visibility = ptrauth_visibility}

undef_access

static bool undef_access(struct kvm_vcpu *vcpu, struct sys_reg_params *p, const struct sys_reg_desc *r)

Definition: sys_regs.c:1334

ptrauth_visibility

static unsigned int ptrauth_visibility(const struct kvm_vcpu *vcpu, const struct sys_reg_desc *rd)

Definition: sys_regs.c:1348

SYS_DESC

#define SYS_DESC(reg)

Definition: sys_regs.h:243

reset_unknown

static u64 reset_unknown(struct kvm_vcpu *vcpu, const struct sys_reg_desc *r)

Definition: sys_regs.h:136

Definition at line 1360 of file sys_regs.c.

◆ AA32_ID_SANITISED

#define AA32_ID_SANITISED ( name )

Value:

    {       \
    ID_DESC(name),              \
    .set_user = set_id_reg,         \
    .visibility = aa32_id_visibility,   \
    .reset = kvm_read_sanitised_id_reg, \
    .val = 0,               \
}

Definition at line 2096 of file sys_regs.c.

◆ AMU_AMEVCNTR0_EL0

#define AMU_AMEVCNTR0_EL0 ( n ) { SYS_DESC(SYS_AMEVCNTR0_EL0(n)), undef_access }

Definition at line 1343 of file sys_regs.c.

◆ AMU_AMEVCNTR1_EL0

#define AMU_AMEVCNTR1_EL0 ( n ) { SYS_DESC(SYS_AMEVCNTR1_EL0(n)), undef_access }

Definition at line 1345 of file sys_regs.c.

◆ AMU_AMEVTYPER0_EL0

#define AMU_AMEVTYPER0_EL0 ( n ) { SYS_DESC(SYS_AMEVTYPER0_EL0(n)), undef_access }

Definition at line 1344 of file sys_regs.c.

◆ AMU_AMEVTYPER1_EL0

#define AMU_AMEVTYPER1_EL0 ( n ) { SYS_DESC(SYS_AMEVTYPER1_EL0(n)), undef_access }

Definition at line 1346 of file sys_regs.c.

◆ CP15_PMU_SYS_REG

#define CP15_PMU_SYS_REG	(	_map,
		_Op1,
		_CRn,
		_CRm,
		_Op2
	)

Value:

    AA32(_map),                         \
    Op1(_Op1), CRn(_CRn), CRm(_CRm), Op2(_Op2),         \
    .visibility = pmu_visibility

Definition at line 2872 of file sys_regs.c.

◆ CSSELR_MAX

#define CSSELR_MAX 14

Definition at line 215 of file sys_regs.c.

◆ DBG_BCR_BVR_WCR_WVR

#define DBG_BCR_BVR_WCR_WVR ( n )

Value:

    /* DBGBVRn */                                 \
    { AA32(LO), Op1( 0), CRn( 0), CRm((n)), Op2( 4), trap_bvr, NULL, n }, \
    /* DBGBCRn */                                 \
    { Op1( 0), CRn( 0), CRm((n)), Op2( 5), trap_bcr, NULL, n },       \
    /* DBGWVRn */                                 \
    { Op1( 0), CRn( 0), CRm((n)), Op2( 6), trap_wvr, NULL, n },       \
    /* DBGWCRn */                                 \
    { Op1( 0), CRn( 0), CRm((n)), Op2( 7), trap_wcr, NULL, n }

Definition at line 2761 of file sys_regs.c.

◆ DBG_BCR_BVR_WCR_WVR_EL1

#define DBG_BCR_BVR_WCR_WVR_EL1 ( n )

Value:

    { SYS_DESC(SYS_DBGBVRn_EL1(n)),                 \
      trap_bvr, reset_bvr, 0, 0, get_bvr, set_bvr },        \
    { SYS_DESC(SYS_DBGBCRn_EL1(n)),                 \
      trap_bcr, reset_bcr, 0, 0, get_bcr, set_bcr },        \
    { SYS_DESC(SYS_DBGWVRn_EL1(n)),                 \
      trap_wvr, reset_wvr, 0, 0,  get_wvr, set_wvr },       \
    { SYS_DESC(SYS_DBGWCRn_EL1(n)),                 \
      trap_wcr, reset_wcr, 0, 0,  get_wcr, set_wcr }

Definition at line 1308 of file sys_regs.c.

◆ DBGBXVR

#define DBGBXVR ( n ) { AA32(HI), Op1( 0), CRn( 1), CRm((n)), Op2( 1), trap_bvr, NULL, n }

Definition at line 2771 of file sys_regs.c.

◆ EL12_REG

#define EL12_REG	(	name,
		acc,
		rst,
		v
	)

Value:

    {       \
    SYS_DESC(SYS_##name##_EL12),        \
    .access = acc,              \
    .reset = rst,               \
    .reg = name##_EL1,          \
    .val = v,               \
    .visibility = hidden_user_visibility,   \
}

Definition at line 2061 of file sys_regs.c.

◆ EL2_REG

#define EL2_REG	(	name,
		acc,
		rst,
		v
	)

Value:

    {       \
    SYS_DESC(SYS_##name),           \
    .access = acc,              \
    .reset = rst,               \
    .reg = name,                \
    .visibility = el2_visibility,       \
    .val = v,               \
}

Definition at line 2038 of file sys_regs.c.

◆ EL2_REG_REDIR

#define EL2_REG_REDIR	(	name,
		rst,
		v
	)	EL2_REG(name, bad_redir_trap, rst, v)

Definition at line 2048 of file sys_regs.c.

◆ EL2_REG_VNCR

#define EL2_REG_VNCR	(	name,
		rst,
		v
	)	EL2_REG(name, bad_vncr_trap, rst, v)

Definition at line 2047 of file sys_regs.c.

◆ FUNCTION_INVARIANT

#define FUNCTION_INVARIANT ( reg )

Value:

    static u64 get_##reg(struct kvm_vcpu *v,            \
                  const struct sys_reg_desc *r)     \
    {                               \
        ((struct sys_reg_desc *)r)->val = read_sysreg(reg); \
        return ((struct sys_reg_desc *)r)->val;         \
    }

Definition at line 3569 of file sys_regs.c.

◆ ID_DESC

#define ID_DESC ( name )

Value:

    SYS_DESC(SYS_##name),           \
    .access = access_id_reg,        \
    .get_user = get_id_reg          \

Definition at line 2081 of file sys_regs.c.

◆ ID_HIDDEN

#define ID_HIDDEN ( name )

Value:

    {           \
    ID_DESC(name),              \
    .set_user = set_id_reg,         \
    .visibility = raz_visibility,       \
    .reset = kvm_read_sanitised_id_reg, \
    .val = 0,               \
}

Definition at line 2133 of file sys_regs.c.

◆ ID_REG_LIMIT_FIELD_ENUM

#define ID_REG_LIMIT_FIELD_ENUM	(	val,
		reg,
		field,
		limit
	)

Value:

({                                         \
    u64 __f_val = FIELD_GET(reg##_##field##_MASK, val);            \
    (val) &= ~reg##_##field##_MASK;                        \
    (val) |= FIELD_PREP(reg##_##field##_MASK,                  \
            min(__f_val, (u64)reg##_##field##_##limit));           \
    (val);                                     \
})

Definition at line 1683 of file sys_regs.c.

◆ ID_SANITISED

#define ID_SANITISED ( name )

Value:

    {           \
    ID_DESC(name),              \
    .set_user = set_id_reg,         \
    .visibility = id_visibility,        \
    .reset = kvm_read_sanitised_id_reg, \
    .val = 0,               \
}

Definition at line 2087 of file sys_regs.c.

◆ ID_UNALLOCATED

#define ID_UNALLOCATED	(	crm,
		op2
	)

Value:

    {           \
    Op0(3), Op1(0), CRn(0), CRm(crm), Op2(op2), \
    .access = access_id_reg,            \
    .get_user = get_id_reg,             \
    .set_user = set_id_reg,             \
    .visibility = raz_visibility,           \
    .reset = kvm_read_sanitised_id_reg,     \
    .val = 0,                   \
}

Definition at line 2118 of file sys_regs.c.

◆ ID_WRITABLE

#define ID_WRITABLE	(	name,
		mask
	)

Value:

    {       \
    ID_DESC(name),              \
    .set_user = set_id_reg,         \
    .visibility = id_visibility,        \
    .reset = kvm_read_sanitised_id_reg, \
    .val = mask,                \
}

Definition at line 2105 of file sys_regs.c.

◆ KVM_ARM_FEATURE_ID_RANGE_INDEX

#define KVM_ARM_FEATURE_ID_RANGE_INDEX ( r )

Value:

    KVM_ARM_FEATURE_ID_RANGE_IDX(sys_reg_Op0(r),        \
        sys_reg_Op1(r),                 \
        sys_reg_CRn(r),                 \
        sys_reg_CRm(r),                 \
        sys_reg_Op2(r))

Definition at line 3874 of file sys_regs.c.

◆ MAPPED_EL2_SYSREG

#define MAPPED_EL2_SYSREG	(	el2,
		el1,
		fn
	)

Value:

    case el2: {                         \
        *xlate = fn;                        \
        *el1r = el1;                        \
        return true;                        \
    }

Definition at line 81 of file sys_regs.c.

◆ MTE_REG

#define MTE_REG ( name )

Value:

    {               \
    SYS_DESC(SYS_##name),           \
    .access = undef_access,         \
    .reset = reset_unknown,         \
    .reg = name,                \
    .visibility = mte_visibility,       \
}

Definition at line 1995 of file sys_regs.c.

◆ PMU_PMEVCNTR

#define PMU_PMEVCNTR ( n )

Value:

    { CP15_PMU_SYS_REG(DIRECT, 0, 0b1110,               \
      (0b1000 | (((n) >> 3) & 0x3)), ((n) & 0x7)),          \
      .access = access_pmu_evcntr }

Definition at line 2878 of file sys_regs.c.

◆ PMU_PMEVCNTR_EL0

#define PMU_PMEVCNTR_EL0 ( n )

Value:

    { PMU_SYS_REG(PMEVCNTRn_EL0(n)),                \
      .reset = reset_pmevcntr, .get_user = get_pmu_evcntr,      \
      .access = access_pmu_evcntr, .reg = (PMEVCNTR0_EL0 + n), }

Definition at line 1323 of file sys_regs.c.

◆ PMU_PMEVTYPER

#define PMU_PMEVTYPER ( n )

Value:

    { CP15_PMU_SYS_REG(DIRECT, 0, 0b1110,               \
      (0b1100 | (((n) >> 3) & 0x3)), ((n) & 0x7)),          \
      .access = access_pmu_evtyper }

Definition at line 2884 of file sys_regs.c.

◆ PMU_PMEVTYPER_EL0

#define PMU_PMEVTYPER_EL0 ( n )

Value:

    { PMU_SYS_REG(PMEVTYPERn_EL0(n)),               \
      .reset = reset_pmevtyper,                 \
      .access = access_pmu_evtyper, .reg = (PMEVTYPER0_EL0 + n), }

Definition at line 1329 of file sys_regs.c.

◆ PMU_SYS_REG

#define PMU_SYS_REG ( name )

Value:

SYS_DESC(SYS_##name), .reset = reset_pmu_reg, \

.visibility = pmu_visibility

reset_pmu_reg

static u64 reset_pmu_reg(struct kvm_vcpu *vcpu, const struct sys_reg_desc *r)

Definition: sys_regs.c:846

Definition at line 1318 of file sys_regs.c.

◆ PTRAUTH_KEY

#define PTRAUTH_KEY ( k )

Value:

__PTRAUTH_KEY(k ## KEYLO_EL1), \

__PTRAUTH_KEY(k ## KEYHI_EL1)

__PTRAUTH_KEY

#define __PTRAUTH_KEY(k)

Definition: sys_regs.c:1360

Definition at line 1364 of file sys_regs.c.

◆ PURE_EL2_SYSREG

#define PURE_EL2_SYSREG ( el2 )

Value:

    case el2: {                         \
        *el1r = el2;                        \
        return true;                        \
    }

Definition at line 75 of file sys_regs.c.

Function Documentation

◆ __kvm_read_sanitised_id_reg()

static u64 __kvm_read_sanitised_id_reg	(	const struct kvm_vcpu *	vcpu,
		const struct sys_reg_desc *	r
	)

static

Definition at line 1517 of file sys_regs.c.

 {
     u32 id = reg_to_encoding(r);
     u64 val;
  
     if (sysreg_visible_as_raz(vcpu, r))
         return 0;
  
     val = read_sanitised_ftr_reg(id);
  
     switch (id) {
     case SYS_ID_AA64PFR1_EL1:
         if (!kvm_has_mte(vcpu->kvm))
             val &= ~ARM64_FEATURE_MASK(ID_AA64PFR1_EL1_MTE);
  
         val &= ~ARM64_FEATURE_MASK(ID_AA64PFR1_EL1_SME);
         break;
     case SYS_ID_AA64ISAR1_EL1:
         if (!vcpu_has_ptrauth(vcpu))
             val &= ~(ARM64_FEATURE_MASK(ID_AA64ISAR1_EL1_APA) |
                  ARM64_FEATURE_MASK(ID_AA64ISAR1_EL1_API) |
                  ARM64_FEATURE_MASK(ID_AA64ISAR1_EL1_GPA) |
                  ARM64_FEATURE_MASK(ID_AA64ISAR1_EL1_GPI));
         break;
     case SYS_ID_AA64ISAR2_EL1:
         if (!vcpu_has_ptrauth(vcpu))
             val &= ~(ARM64_FEATURE_MASK(ID_AA64ISAR2_EL1_APA3) |
                  ARM64_FEATURE_MASK(ID_AA64ISAR2_EL1_GPA3));
         if (!cpus_have_final_cap(ARM64_HAS_WFXT))
             val &= ~ARM64_FEATURE_MASK(ID_AA64ISAR2_EL1_WFxT);
         break;
     case SYS_ID_AA64MMFR2_EL1:
         val &= ~ID_AA64MMFR2_EL1_CCIDX_MASK;
         break;
     case SYS_ID_MMFR4_EL1:
         val &= ~ARM64_FEATURE_MASK(ID_MMFR4_EL1_CCIDX);
         break;
     }
  
     return val;
 }

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◆ aa32_id_visibility()

static unsigned int aa32_id_visibility	(	const struct kvm_vcpu *	vcpu,
		const struct sys_reg_desc *	r
	)

static

Definition at line 1604 of file sys_regs.c.

 {
     /*
      * AArch32 ID registers are UNKNOWN if AArch32 isn't implemented at any
      * EL. Promote to RAZ/WI in order to guarantee consistency between
      * systems.
      */
     if (!kvm_supports_32bit_el0())
         return REG_RAZ | REG_USER_WI;
  
     return id_visibility(vcpu, r);
 }

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◆ access_actlr()

static bool access_actlr	(	struct kvm_vcpu *	vcpu,
		struct sys_reg_params *	p,
		const struct sys_reg_desc *	r
	)

static

Definition at line 403 of file sys_regs.c.

 {
     u64 mask, shift;
  
     if (p->is_write)
         return ignore_write(vcpu, p);
  
     get_access_mask(r, &mask, &shift);
     p->regval = (vcpu_read_sys_reg(vcpu, r->reg) & mask) >> shift;
  
     return true;
 }

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◆ access_arch_timer()

static bool access_arch_timer	(	struct kvm_vcpu *	vcpu,
		struct sys_reg_params *	p,
		const struct sys_reg_desc *	r
	)

static

Definition at line 1368 of file sys_regs.c.

 {
     enum kvm_arch_timers tmr;
     enum kvm_arch_timer_regs treg;
     u64 reg = reg_to_encoding(r);
  
     switch (reg) {
     case SYS_CNTP_TVAL_EL0:
     case SYS_AARCH32_CNTP_TVAL:
         tmr = TIMER_PTIMER;
         treg = TIMER_REG_TVAL;
         break;
     case SYS_CNTP_CTL_EL0:
     case SYS_AARCH32_CNTP_CTL:
         tmr = TIMER_PTIMER;
         treg = TIMER_REG_CTL;
         break;
     case SYS_CNTP_CVAL_EL0:
     case SYS_AARCH32_CNTP_CVAL:
         tmr = TIMER_PTIMER;
         treg = TIMER_REG_CVAL;
         break;
     case SYS_CNTPCT_EL0:
     case SYS_CNTPCTSS_EL0:
     case SYS_AARCH32_CNTPCT:
         tmr = TIMER_PTIMER;
         treg = TIMER_REG_CNT;
         break;
     default:
         print_sys_reg_msg(p, "%s", "Unhandled trapped timer register");
         kvm_inject_undefined(vcpu);
         return false;
     }
  
     if (p->is_write)
         kvm_arm_timer_write_sysreg(vcpu, tmr, treg, p->regval);
     else
         p->regval = kvm_arm_timer_read_sysreg(vcpu, tmr, treg);
  
     return true;
 }

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◆ access_ccsidr()

static bool access_ccsidr	(	struct kvm_vcpu *	vcpu,
		struct sys_reg_params *	p,
		const struct sys_reg_desc *	r
	)

static

Definition at line 1970 of file sys_regs.c.

 {
     u32 csselr;
  
     if (p->is_write)
         return write_to_read_only(vcpu, p, r);
  
     csselr = vcpu_read_sys_reg(vcpu, CSSELR_EL1);
     csselr &= CSSELR_EL1_Level | CSSELR_EL1_InD;
     if (csselr < CSSELR_MAX)
         p->regval = get_ccsidr(vcpu, csselr);
  
     return true;
 }

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◆ access_clidr()

static bool access_clidr	(	struct kvm_vcpu *	vcpu,
		struct sys_reg_params *	p,
		const struct sys_reg_desc *	r
	)

static

Definition at line 1878 of file sys_regs.c.

 {
     if (p->is_write)
         return write_to_read_only(vcpu, p, r);
  
     p->regval = __vcpu_sys_reg(vcpu, r->reg);
     return true;
 }

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◆ access_csselr()

static bool access_csselr	(	struct kvm_vcpu *	vcpu,
		struct sys_reg_params *	p,
		const struct sys_reg_desc *	r
	)

static

Definition at line 1958 of file sys_regs.c.

 {
     int reg = r->reg;
  
     if (p->is_write)
         vcpu_write_sys_reg(vcpu, p->regval, reg);
     else
         p->regval = vcpu_read_sys_reg(vcpu, reg);
     return true;
 }

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◆ access_ctr()

static bool access_ctr	(	struct kvm_vcpu *	vcpu,
		struct sys_reg_params *	p,
		const struct sys_reg_desc *	r
	)

static

Definition at line 1868 of file sys_regs.c.

 {
     if (p->is_write)
         return write_to_read_only(vcpu, p, r);
  
     p->regval = read_sanitised_ftr_reg(SYS_CTR_EL0);
     return true;
 }

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◆ access_dcgsw()

static bool access_dcgsw	(	struct kvm_vcpu *	vcpu,
		struct sys_reg_params *	p,
		const struct sys_reg_desc *	r
	)

static

Definition at line 342 of file sys_regs.c.

 {
     if (!kvm_has_mte(vcpu->kvm)) {
         kvm_inject_undefined(vcpu);
         return false;
     }
  
     /* Treat MTE S/W ops as we treat the classic ones: with contempt */
     return access_dcsw(vcpu, p, r);
 }

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◆ access_dcsw()

static bool access_dcsw	(	struct kvm_vcpu *	vcpu,
		struct sys_reg_params *	p,
		const struct sys_reg_desc *	r
	)

static

Definition at line 322 of file sys_regs.c.

 {
     if (!p->is_write)
         return read_from_write_only(vcpu, p, r);
  
     /*
      * Only track S/W ops if we don't have FWB. It still indicates
      * that the guest is a bit broken (S/W operations should only
      * be done by firmware, knowing that there is only a single
      * CPU left in the system, and certainly not from non-secure
      * software).
      */
     if (!cpus_have_final_cap(ARM64_HAS_STAGE2_FWB))
         kvm_set_way_flush(vcpu);
  
     return true;
 }

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◆ access_elr()

static bool access_elr	(	struct kvm_vcpu *	vcpu,
		struct sys_reg_params *	p,
		const struct sys_reg_desc *	r
	)

static

Definition at line 2153 of file sys_regs.c.

 {
     if (p->is_write)
         vcpu_write_sys_reg(vcpu, p->regval, ELR_EL1);
     else
         p->regval = vcpu_read_sys_reg(vcpu, ELR_EL1);
  
     return true;
 }

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◆ access_gic_sgi()

static bool access_gic_sgi	(	struct kvm_vcpu *	vcpu,
		struct sys_reg_params *	p,
		const struct sys_reg_desc *	r
	)

static

Definition at line 424 of file sys_regs.c.

 {
     bool g1;
  
     if (!p->is_write)
         return read_from_write_only(vcpu, p, r);
  
     /*
      * In a system where GICD_CTLR.DS=1, a ICC_SGI0R_EL1 access generates
      * Group0 SGIs only, while ICC_SGI1R_EL1 can generate either group,
      * depending on the SGI configuration. ICC_ASGI1R_EL1 is effectively
      * equivalent to ICC_SGI0R_EL1, as there is no "alternative" secure
      * group.
      */
     if (p->Op0 == 0) {      /* AArch32 */
         switch (p->Op1) {
         default:        /* Keep GCC quiet */
         case 0:         /* ICC_SGI1R */
             g1 = true;
             break;
         case 1:         /* ICC_ASGI1R */
         case 2:         /* ICC_SGI0R */
             g1 = false;
             break;
         }
     } else {            /* AArch64 */
         switch (p->Op2) {
         default:        /* Keep GCC quiet */
         case 5:         /* ICC_SGI1R_EL1 */
             g1 = true;
             break;
         case 6:         /* ICC_ASGI1R_EL1 */
         case 7:         /* ICC_SGI0R_EL1 */
             g1 = false;
             break;
         }
     }
  
     vgic_v3_dispatch_sgi(vcpu, p->regval, g1);
  
     return true;
 }

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◆ access_gic_sre()

static bool access_gic_sre	(	struct kvm_vcpu *	vcpu,
		struct sys_reg_params *	p,
		const struct sys_reg_desc *	r
	)

static

Definition at line 469 of file sys_regs.c.

 {
     if (p->is_write)
         return ignore_write(vcpu, p);
  
     p->regval = vcpu->arch.vgic_cpu.vgic_v3.vgic_sre;
     return true;
 }

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◆ access_id_reg()

static bool access_id_reg	(	struct kvm_vcpu *	vcpu,
		struct sys_reg_params *	p,
		const struct sys_reg_desc *	r
	)

static

Definition at line 1626 of file sys_regs.c.

 {
     if (p->is_write)
         return write_to_read_only(vcpu, p, r);
  
     p->regval = read_id_reg(vcpu, r);
  
     return true;
 }

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◆ access_pmceid()

static bool access_pmceid	(	struct kvm_vcpu *	vcpu,
		struct sys_reg_params *	p,
		const struct sys_reg_desc *	r
	)

static

Definition at line 980 of file sys_regs.c.

 {
     u64 pmceid, mask, shift;
  
     BUG_ON(p->is_write);
  
     if (pmu_access_el0_disabled(vcpu))
         return false;
  
     get_access_mask(r, &mask, &shift);
  
     pmceid = kvm_pmu_get_pmceid(vcpu, (p->Op2 & 1));
     pmceid &= mask;
     pmceid >>= shift;
  
     p->regval = pmceid;
  
     return true;
 }

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◆ access_pmcnten()

static bool access_pmcnten	(	struct kvm_vcpu *	vcpu,
		struct sys_reg_params *	p,
		const struct sys_reg_desc *	r
	)

static

Definition at line 1153 of file sys_regs.c.

 {
     u64 val, mask;
  
     if (pmu_access_el0_disabled(vcpu))
         return false;
  
     mask = kvm_pmu_valid_counter_mask(vcpu);
     if (p->is_write) {
         val = p->regval & mask;
         if (r->Op2 & 0x1) {
             /* accessing PMCNTENSET_EL0 */
             __vcpu_sys_reg(vcpu, PMCNTENSET_EL0) |= val;
             kvm_pmu_enable_counter_mask(vcpu, val);
             kvm_vcpu_pmu_restore_guest(vcpu);
         } else {
             /* accessing PMCNTENCLR_EL0 */
             __vcpu_sys_reg(vcpu, PMCNTENSET_EL0) &= ~val;
             kvm_pmu_disable_counter_mask(vcpu, val);
         }
     } else {
         p->regval = __vcpu_sys_reg(vcpu, PMCNTENSET_EL0);
     }
  
     return true;
 }

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◆ access_pmcr()

static bool access_pmcr	(	struct kvm_vcpu *	vcpu,
		struct sys_reg_params *	p,
		const struct sys_reg_desc *	r
	)

static

Definition at line 935 of file sys_regs.c.

 {
     u64 val;
  
     if (pmu_access_el0_disabled(vcpu))
         return false;
  
     if (p->is_write) {
         /*
          * Only update writeable bits of PMCR (continuing into
          * kvm_pmu_handle_pmcr() as well)
          */
         val = kvm_vcpu_read_pmcr(vcpu);
         val &= ~ARMV8_PMU_PMCR_MASK;
         val |= p->regval & ARMV8_PMU_PMCR_MASK;
         if (!kvm_supports_32bit_el0())
             val |= ARMV8_PMU_PMCR_LC;
         kvm_pmu_handle_pmcr(vcpu, val);
     } else {
         /* PMCR.P & PMCR.C are RAZ */
         val = kvm_vcpu_read_pmcr(vcpu)
               & ~(ARMV8_PMU_PMCR_P | ARMV8_PMU_PMCR_C);
         p->regval = val;
     }
  
     return true;
 }

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◆ access_pminten()

static bool access_pminten	(	struct kvm_vcpu *	vcpu,
		struct sys_reg_params *	p,
		const struct sys_reg_desc *	r
	)

static

Definition at line 1181 of file sys_regs.c.

 {
     u64 mask = kvm_pmu_valid_counter_mask(vcpu);
  
     if (check_pmu_access_disabled(vcpu, 0))
         return false;
  
     if (p->is_write) {
         u64 val = p->regval & mask;
  
         if (r->Op2 & 0x1)
             /* accessing PMINTENSET_EL1 */
             __vcpu_sys_reg(vcpu, PMINTENSET_EL1) |= val;
         else
             /* accessing PMINTENCLR_EL1 */
             __vcpu_sys_reg(vcpu, PMINTENSET_EL1) &= ~val;
     } else {
         p->regval = __vcpu_sys_reg(vcpu, PMINTENSET_EL1);
     }
  
     return true;
 }

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◆ access_pmovs()

static bool access_pmovs	(	struct kvm_vcpu *	vcpu,
		struct sys_reg_params *	p,
		const struct sys_reg_desc *	r
	)

static

Definition at line 1205 of file sys_regs.c.

 {
     u64 mask = kvm_pmu_valid_counter_mask(vcpu);
  
     if (pmu_access_el0_disabled(vcpu))
         return false;
  
     if (p->is_write) {
         if (r->CRm & 0x2)
             /* accessing PMOVSSET_EL0 */
             __vcpu_sys_reg(vcpu, PMOVSSET_EL0) |= (p->regval & mask);
         else
             /* accessing PMOVSCLR_EL0 */
             __vcpu_sys_reg(vcpu, PMOVSSET_EL0) &= ~(p->regval & mask);
     } else {
         p->regval = __vcpu_sys_reg(vcpu, PMOVSSET_EL0);
     }
  
     return true;
 }

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◆ access_pmselr()

static bool access_pmselr	(	struct kvm_vcpu *	vcpu,
		struct sys_reg_params *	p,
		const struct sys_reg_desc *	r
	)

static

Definition at line 964 of file sys_regs.c.

 {
     if (pmu_access_event_counter_el0_disabled(vcpu))
         return false;
  
     if (p->is_write)
         __vcpu_sys_reg(vcpu, PMSELR_EL0) = p->regval;
     else
         /* return PMSELR.SEL field */
         p->regval = __vcpu_sys_reg(vcpu, PMSELR_EL0)
                 & ARMV8_PMU_COUNTER_MASK;
  
     return true;
 }

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◆ access_pmswinc()

static bool access_pmswinc	(	struct kvm_vcpu *	vcpu,
		struct sys_reg_params *	p,
		const struct sys_reg_desc *	r
	)

static

Definition at line 1227 of file sys_regs.c.

 {
     u64 mask;
  
     if (!p->is_write)
         return read_from_write_only(vcpu, p, r);
  
     if (pmu_write_swinc_el0_disabled(vcpu))
         return false;
  
     mask = kvm_pmu_valid_counter_mask(vcpu);
     kvm_pmu_software_increment(vcpu, p->regval & mask);
     return true;
 }

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◆ access_pmu_evcntr()

static bool access_pmu_evcntr	(	struct kvm_vcpu *	vcpu,
		struct sys_reg_params *	p,
		const struct sys_reg_desc *	r
	)

static

Definition at line 1031 of file sys_regs.c.

 {
     u64 idx = ~0UL;
  
     if (r->CRn == 9 && r->CRm == 13) {
         if (r->Op2 == 2) {
             /* PMXEVCNTR_EL0 */
             if (pmu_access_event_counter_el0_disabled(vcpu))
                 return false;
  
             idx = __vcpu_sys_reg(vcpu, PMSELR_EL0)
                   & ARMV8_PMU_COUNTER_MASK;
         } else if (r->Op2 == 0) {
             /* PMCCNTR_EL0 */
             if (pmu_access_cycle_counter_el0_disabled(vcpu))
                 return false;
  
             idx = ARMV8_PMU_CYCLE_IDX;
         }
     } else if (r->CRn == 0 && r->CRm == 9) {
         /* PMCCNTR */
         if (pmu_access_event_counter_el0_disabled(vcpu))
             return false;
  
         idx = ARMV8_PMU_CYCLE_IDX;
     } else if (r->CRn == 14 && (r->CRm & 12) == 8) {
         /* PMEVCNTRn_EL0 */
         if (pmu_access_event_counter_el0_disabled(vcpu))
             return false;
  
         idx = ((r->CRm & 3) << 3) | (r->Op2 & 7);
     }
  
     /* Catch any decoding mistake */
     WARN_ON(idx == ~0UL);
  
     if (!pmu_counter_idx_valid(vcpu, idx))
         return false;
  
     if (p->is_write) {
         if (pmu_access_el0_disabled(vcpu))
             return false;
  
         kvm_pmu_set_counter_value(vcpu, idx, p->regval);
     } else {
         p->regval = kvm_pmu_get_counter_value(vcpu, idx);
     }
  
     return true;
 }

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◆ access_pmu_evtyper()

static bool access_pmu_evtyper	(	struct kvm_vcpu *	vcpu,
		struct sys_reg_params *	p,
		const struct sys_reg_desc *	r
	)

static

Definition at line 1084 of file sys_regs.c.

 {
     u64 idx, reg;
  
     if (pmu_access_el0_disabled(vcpu))
         return false;
  
     if (r->CRn == 9 && r->CRm == 13 && r->Op2 == 1) {
         /* PMXEVTYPER_EL0 */
         idx = __vcpu_sys_reg(vcpu, PMSELR_EL0) & ARMV8_PMU_COUNTER_MASK;
         reg = PMEVTYPER0_EL0 + idx;
     } else if (r->CRn == 14 && (r->CRm & 12) == 12) {
         idx = ((r->CRm & 3) << 3) | (r->Op2 & 7);
         if (idx == ARMV8_PMU_CYCLE_IDX)
             reg = PMCCFILTR_EL0;
         else
             /* PMEVTYPERn_EL0 */
             reg = PMEVTYPER0_EL0 + idx;
     } else {
         BUG();
     }
  
     if (!pmu_counter_idx_valid(vcpu, idx))
         return false;
  
     if (p->is_write) {
         kvm_pmu_set_counter_event_type(vcpu, p->regval, idx);
         kvm_vcpu_pmu_restore_guest(vcpu);
     } else {
         p->regval = __vcpu_sys_reg(vcpu, reg);
     }
  
     return true;
 }

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◆ access_pmuserenr()

static bool access_pmuserenr	(	struct kvm_vcpu *	vcpu,
		struct sys_reg_params *	p,
		const struct sys_reg_desc *	r
	)

static

Definition at line 1243 of file sys_regs.c.

 {
     if (p->is_write) {
         if (!vcpu_mode_priv(vcpu)) {
             kvm_inject_undefined(vcpu);
             return false;
         }
  
         __vcpu_sys_reg(vcpu, PMUSERENR_EL0) =
                    p->regval & ARMV8_PMU_USERENR_MASK;
     } else {
         p->regval = __vcpu_sys_reg(vcpu, PMUSERENR_EL0)
                 & ARMV8_PMU_USERENR_MASK;
     }
  
     return true;
 }

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◆ access_rw()

static bool access_rw	(	struct kvm_vcpu *	vcpu,
		struct sys_reg_params *	p,
		const struct sys_reg_desc *	r
	)

static

Definition at line 307 of file sys_regs.c.

 {
     if (p->is_write)
         vcpu_write_sys_reg(vcpu, p->regval, r->reg);
     else
         p->regval = vcpu_read_sys_reg(vcpu, r->reg);
  
     return true;
 }

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◆ access_sp_el1()

static bool access_sp_el1	(	struct kvm_vcpu *	vcpu,
		struct sys_reg_params *	p,
		const struct sys_reg_desc *	r
	)

static

Definition at line 2141 of file sys_regs.c.

 {
     if (p->is_write)
         __vcpu_sys_reg(vcpu, SP_EL1) = p->regval;
     else
         p->regval = __vcpu_sys_reg(vcpu, SP_EL1);
  
     return true;
 }

◆ access_spsr()

static bool access_spsr	(	struct kvm_vcpu *	vcpu,
		struct sys_reg_params *	p,
		const struct sys_reg_desc *	r
	)

static

Definition at line 2165 of file sys_regs.c.

 {
     if (p->is_write)
         __vcpu_sys_reg(vcpu, SPSR_EL1) = p->regval;
     else
         p->regval = __vcpu_sys_reg(vcpu, SPSR_EL1);
  
     return true;
 }

◆ access_vm_reg()

static bool access_vm_reg	(	struct kvm_vcpu *	vcpu,
		struct sys_reg_params *	p,
		const struct sys_reg_desc *	r
	)

static

Definition at line 378 of file sys_regs.c.

 {
     bool was_enabled = vcpu_has_cache_enabled(vcpu);
     u64 val, mask, shift;
  
     BUG_ON(!p->is_write);
  
     get_access_mask(r, &mask, &shift);
  
     if (~mask) {
         val = vcpu_read_sys_reg(vcpu, r->reg);
         val &= ~mask;
     } else {
         val = 0;
     }
  
     val |= (p->regval & (mask >> shift)) << shift;
     vcpu_write_sys_reg(vcpu, val, r->reg);
  
     kvm_toggle_cache(vcpu, was_enabled);
     return true;
 }

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◆ arm64_check_features()

static int arm64_check_features	(	struct kvm_vcpu *	vcpu,
		const struct sys_reg_desc *	rd,
		u64	val
	)

static

Definition at line 1450 of file sys_regs.c.

 {
     const struct arm64_ftr_reg *ftr_reg;
     const struct arm64_ftr_bits *ftrp = NULL;
     u32 id = reg_to_encoding(rd);
     u64 writable_mask = rd->val;
     u64 limit = rd->reset(vcpu, rd);
     u64 mask = 0;
  
     /*
      * Hidden and unallocated ID registers may not have a corresponding
      * struct arm64_ftr_reg. Of course, if the register is RAZ we know the
      * only safe value is 0.
      */
     if (sysreg_visible_as_raz(vcpu, rd))
         return val ? -E2BIG : 0;
  
     ftr_reg = get_arm64_ftr_reg(id);
     if (!ftr_reg)
         return -EINVAL;
  
     ftrp = ftr_reg->ftr_bits;
  
     for (; ftrp && ftrp->width; ftrp++) {
         s64 f_val, f_lim, safe_val;
         u64 ftr_mask;
  
         ftr_mask = arm64_ftr_mask(ftrp);
         if ((ftr_mask & writable_mask) != ftr_mask)
             continue;
  
         f_val = arm64_ftr_value(ftrp, val);
         f_lim = arm64_ftr_value(ftrp, limit);
         mask |= ftr_mask;
  
         if (f_val == f_lim)
             safe_val = f_val;
         else
             safe_val = kvm_arm64_ftr_safe_value(id, ftrp, f_val, f_lim);
  
         if (safe_val != f_val)
             return -E2BIG;
     }
  
     /* For fields that are not writable, values in limit are the safe values. */
     if ((val & ~mask) != (limit & ~mask))
         return -E2BIG;
  
     return 0;
 }

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◆ bad_redir_trap()

static bool bad_redir_trap	(	struct kvm_vcpu *	vcpu,
		struct sys_reg_params *	p,
		const struct sys_reg_desc *	r
	)

static

Definition at line 2025 of file sys_regs.c.

 {
     /*
      * We really shouldn't be here, and this is likely the result
      * of a misconfigured trap, as this register should target the
      * corresponding EL1, and nothing else.
      */
     return bad_trap(vcpu, p, r,
             "trap of EL2 register redirected to EL1");
 }

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◆ bad_trap()

static bool bad_trap	(	struct kvm_vcpu *	vcpu,
		struct sys_reg_params *	params,
		const struct sys_reg_desc *	r,
		const char *	msg
	)

static

Definition at line 48 of file sys_regs.c.

 {
     WARN_ONCE(1, "Unexpected %s\n", msg);
     print_sys_reg_instr(params);
     kvm_inject_undefined(vcpu);
     return false;
 }

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◆ bad_vncr_trap()

static bool bad_vncr_trap	(	struct kvm_vcpu *	vcpu,
		struct sys_reg_params *	p,
		const struct sys_reg_desc *	r
	)

static

Definition at line 2012 of file sys_regs.c.

 {
     /*
      * We really shouldn't be here, and this is likely the result
      * of a misconfigured trap, as this register should target the
      * VNCR page, and nothing else.
      */
     return bad_trap(vcpu, p, r,
             "trap of VNCR-backed register");
 }

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◆ check_pmu_access_disabled()

static bool check_pmu_access_disabled	(	struct kvm_vcpu *	vcpu,
		u64	flags
	)

static

Definition at line 904 of file sys_regs.c.

 {
     u64 reg = __vcpu_sys_reg(vcpu, PMUSERENR_EL0);
     bool enabled = (reg & flags) || vcpu_mode_priv(vcpu);
  
     if (!enabled)
         kvm_inject_undefined(vcpu);
  
     return !enabled;
 }

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◆ check_sysreg_table()

static bool check_sysreg_table	(	const struct sys_reg_desc *	table,
		unsigned int	n,
		bool	is_32
	)

static

Definition at line 3053 of file sys_regs.c.

 {
     unsigned int i;
  
     for (i = 0; i < n; i++) {
         if (!is_32 && table[i].reg && !table[i].reset) {
             kvm_err("sys_reg table %pS entry %d lacks reset\n", &table[i], i);
             return false;
         }
  
         if (i && cmp_sys_reg(&table[i-1], &table[i]) >= 0) {
             kvm_err("sys_reg table %pS entry %d out of order\n", &table[i - 1], i - 1);
             return false;
         }
     }
  
     return true;
 }

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◆ copy_reg_to_user()

static bool copy_reg_to_user	(	const struct sys_reg_desc *	reg,
		u64 __user **	uind
	)

static

Definition at line 3795 of file sys_regs.c.

 {
     if (!*uind)
         return true;
  
     if (put_user(sys_reg_to_index(reg), *uind))
         return false;
  
     (*uind)++;
     return true;
 }

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◆ dbg_to_reg()

static void dbg_to_reg	(	struct kvm_vcpu *	vcpu,
		struct sys_reg_params *	p,
		const struct sys_reg_desc *	rd,
		u64 *	dbg_reg
	)

static

Definition at line 643 of file sys_regs.c.

 {
     u64 mask, shift;
  
     get_access_mask(rd, &mask, &shift);
     p->regval = (*dbg_reg & mask) >> shift;
 }

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◆ demux_c15_get()

static int demux_c15_get	(	struct kvm_vcpu *	vcpu,
		u64	id,
		void __user *	uaddr
	)

static

Definition at line 3627 of file sys_regs.c.

 {
     u32 val;
     u32 __user *uval = uaddr;
  
     /* Fail if we have unknown bits set. */
     if (id & ~(KVM_REG_ARCH_MASK|KVM_REG_SIZE_MASK|KVM_REG_ARM_COPROC_MASK
            | ((1 << KVM_REG_ARM_COPROC_SHIFT)-1)))
         return -ENOENT;
  
     switch (id & KVM_REG_ARM_DEMUX_ID_MASK) {
     case KVM_REG_ARM_DEMUX_ID_CCSIDR:
         if (KVM_REG_SIZE(id) != 4)
             return -ENOENT;
         val = (id & KVM_REG_ARM_DEMUX_VAL_MASK)
             >> KVM_REG_ARM_DEMUX_VAL_SHIFT;
         if (val >= CSSELR_MAX)
             return -ENOENT;
  
         return put_user(get_ccsidr(vcpu, val), uval);
     default:
         return -ENOENT;
     }
 }

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◆ demux_c15_set()

static int demux_c15_set	(	struct kvm_vcpu *	vcpu,
		u64	id,
		void __user *	uaddr
	)

static

Definition at line 3652 of file sys_regs.c.

 {
     u32 val, newval;
     u32 __user *uval = uaddr;
  
     /* Fail if we have unknown bits set. */
     if (id & ~(KVM_REG_ARCH_MASK|KVM_REG_SIZE_MASK|KVM_REG_ARM_COPROC_MASK
            | ((1 << KVM_REG_ARM_COPROC_SHIFT)-1)))
         return -ENOENT;
  
     switch (id & KVM_REG_ARM_DEMUX_ID_MASK) {
     case KVM_REG_ARM_DEMUX_ID_CCSIDR:
         if (KVM_REG_SIZE(id) != 4)
             return -ENOENT;
         val = (id & KVM_REG_ARM_DEMUX_VAL_MASK)
             >> KVM_REG_ARM_DEMUX_VAL_SHIFT;
         if (val >= CSSELR_MAX)
             return -ENOENT;
  
         if (get_user(newval, uval))
             return -EFAULT;
  
         return set_ccsidr(vcpu, val, newval);
     default:
         return -ENOENT;
     }
 }

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◆ el2_visibility()

static unsigned int el2_visibility	(	const struct kvm_vcpu *	vcpu,
		const struct sys_reg_desc *	rd
	)

static

Definition at line 2003 of file sys_regs.c.

 {
     if (vcpu_has_nv(vcpu))
         return 0;
  
     return REG_HIDDEN;
 }

◆ emulate_cp()

static bool emulate_cp	(	struct kvm_vcpu *	vcpu,
		struct sys_reg_params *	params,
		const struct sys_reg_desc *	table,
		size_t	num
	)

static

Definition at line 3113 of file sys_regs.c.

 {
     const struct sys_reg_desc *r;
  
     if (!table)
         return false;   /* Not handled */
  
     r = find_reg(params, table, num);
  
     if (r) {
         perform_access(vcpu, params, r);
         return true;
     }
  
     /* Not handled */
     return false;
 }

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◆ emulate_sys_reg()

static bool emulate_sys_reg	(	struct kvm_vcpu *	vcpu,
		struct sys_reg_params *	params
	)

static

emulate_sys_reg - Emulate a guest access to an AArch64 system register @vcpu: The VCPU pointer @params: Decoded system register parameters

Return: true if the system register access was successful, false otherwise.

Definition at line 3400 of file sys_regs.c.

 {
     const struct sys_reg_desc *r;
  
     r = find_reg(params, sys_reg_descs, ARRAY_SIZE(sys_reg_descs));
  
     if (likely(r)) {
         perform_access(vcpu, params, r);
         return true;
     }
  
     if (is_imp_def_sys_reg(params)) {
         kvm_inject_undefined(vcpu);
     } else {
         print_sys_reg_msg(params,
                   "Unsupported guest sys_reg access at: %lx [%08lx]\n",
                   *vcpu_pc(vcpu), *vcpu_cpsr(vcpu));
         kvm_inject_undefined(vcpu);
     }
     return false;
 }

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◆ get_access_mask()

static void get_access_mask	(	const struct sys_reg_desc *	r,
		u64 *	mask,
		u64 *	shift
	)

static

Definition at line 355 of file sys_regs.c.

 {
     switch (r->aarch32_map) {
     case AA32_LO:
         *mask = GENMASK_ULL(31, 0);
         *shift = 0;
         break;
     case AA32_HI:
         *mask = GENMASK_ULL(63, 32);
         *shift = 32;
         break;
     default:
         *mask = GENMASK_ULL(63, 0);
         *shift = 0;
         break;
     }
 }

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◆ get_bcr()

static int get_bcr	(	struct kvm_vcpu *	vcpu,
		const struct sys_reg_desc *	rd,
		u64 *	val
	)

static

Definition at line 714 of file sys_regs.c.

 {
     *val = vcpu->arch.vcpu_debug_state.dbg_bcr[rd->CRm];
     return 0;
 }

◆ get_bvr()

static int get_bvr	(	struct kvm_vcpu *	vcpu,
		const struct sys_reg_desc *	rd,
		u64 *	val
	)

static

Definition at line 677 of file sys_regs.c.

 {
     *val = vcpu->arch.vcpu_debug_state.dbg_bvr[rd->CRm];
     return 0;
 }

◆ get_ccsidr()

static u32 get_ccsidr	(	struct kvm_vcpu *	vcpu,
		u32	csselr
	)

static

Definition at line 243 of file sys_regs.c.

 {
     u8 line_size;
  
     if (vcpu->arch.ccsidr)
         return vcpu->arch.ccsidr[csselr];
  
     line_size = get_min_cache_line_size(csselr & CSSELR_EL1_InD);
  
     /*
      * Fabricate a CCSIDR value as the overriding value does not exist.
      * The real CCSIDR value will not be used as it can vary by the
      * physical CPU which the vcpu currently resides in.
      *
      * The line size is determined with get_min_cache_line_size(), which
      * should be valid for all CPUs even if they have different cache
      * configuration.
      *
      * The associativity bits are cleared, meaning the geometry of all data
      * and unified caches (which are guaranteed to be PIPT and thus
      * non-aliasing) are 1 set and 1 way.
      * Guests should not be doing cache operations by set/way at all, and
      * for this reason, we trap them and attempt to infer the intent, so
      * that we can flush the entire guest's address space at the appropriate
      * time. The exposed geometry minimizes the number of the traps.
      * [If guests should attempt to infer aliasing properties from the
      * geometry (which is not permitted by the architecture), they would
      * only do so for virtually indexed caches.]
      *
      * We don't check if the cache level exists as it is allowed to return
      * an UNKNOWN value if not.
      */
     return SYS_FIELD_PREP(CCSIDR_EL1, LineSize, line_size - 4);
 }

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◆ get_ctr_el0()

static u64 get_ctr_el0	(	struct kvm_vcpu *	v,
		const struct sys_reg_desc *	r
	)

static

Definition at line 3581 of file sys_regs.c.

 {
     ((struct sys_reg_desc *)r)->val = read_sanitised_ftr_reg(SYS_CTR_EL0);
     return ((struct sys_reg_desc *)r)->val;
 }

◆ get_el2_to_el1_mapping()

static bool get_el2_to_el1_mapping	(	unsigned int	reg,
		unsigned int *	el1r,
		u64(**)(u64)	xlate
	)

static

Definition at line 88 of file sys_regs.c.

 {
     switch (reg) {
         PURE_EL2_SYSREG(  VPIDR_EL2 );
         PURE_EL2_SYSREG(  VMPIDR_EL2    );
         PURE_EL2_SYSREG(  ACTLR_EL2 );
         PURE_EL2_SYSREG(  HCR_EL2   );
         PURE_EL2_SYSREG(  MDCR_EL2  );
         PURE_EL2_SYSREG(  HSTR_EL2  );
         PURE_EL2_SYSREG(  HACR_EL2  );
         PURE_EL2_SYSREG(  VTTBR_EL2 );
         PURE_EL2_SYSREG(  VTCR_EL2  );
         PURE_EL2_SYSREG(  RVBAR_EL2 );
         PURE_EL2_SYSREG(  TPIDR_EL2 );
         PURE_EL2_SYSREG(  HPFAR_EL2 );
         PURE_EL2_SYSREG(  CNTHCTL_EL2   );
         MAPPED_EL2_SYSREG(SCTLR_EL2,   SCTLR_EL1,
                   translate_sctlr_el2_to_sctlr_el1       );
         MAPPED_EL2_SYSREG(CPTR_EL2,    CPACR_EL1,
                   translate_cptr_el2_to_cpacr_el1        );
         MAPPED_EL2_SYSREG(TTBR0_EL2,   TTBR0_EL1,
                   translate_ttbr0_el2_to_ttbr0_el1       );
         MAPPED_EL2_SYSREG(TTBR1_EL2,   TTBR1_EL1,   NULL         );
         MAPPED_EL2_SYSREG(TCR_EL2,     TCR_EL1,
                   translate_tcr_el2_to_tcr_el1           );
         MAPPED_EL2_SYSREG(VBAR_EL2,    VBAR_EL1,    NULL         );
         MAPPED_EL2_SYSREG(AFSR0_EL2,   AFSR0_EL1,   NULL         );
         MAPPED_EL2_SYSREG(AFSR1_EL2,   AFSR1_EL1,   NULL         );
         MAPPED_EL2_SYSREG(ESR_EL2,     ESR_EL1,     NULL         );
         MAPPED_EL2_SYSREG(FAR_EL2,     FAR_EL1,     NULL         );
         MAPPED_EL2_SYSREG(MAIR_EL2,    MAIR_EL1,    NULL         );
         MAPPED_EL2_SYSREG(AMAIR_EL2,   AMAIR_EL1,   NULL         );
         MAPPED_EL2_SYSREG(ELR_EL2,     ELR_EL1,     NULL         );
         MAPPED_EL2_SYSREG(SPSR_EL2,    SPSR_EL1,    NULL         );
     default:
         return false;
     }
 }

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◆ get_id_reg()

static int get_id_reg	(	struct kvm_vcpu *	vcpu,
		const struct sys_reg_desc *	rd,
		u64 *	val
	)

static

Definition at line 1796 of file sys_regs.c.

 {
     /*
      * Avoid locking if the VM has already started, as the ID registers are
      * guaranteed to be invariant at that point.
      */
     if (kvm_vm_has_ran_once(vcpu->kvm)) {
         *val = read_id_reg(vcpu, rd);
         return 0;
     }
  
     mutex_lock(&vcpu->kvm->arch.config_lock);
     *val = read_id_reg(vcpu, rd);
     mutex_unlock(&vcpu->kvm->arch.config_lock);
  
     return 0;
 }

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◆ get_invariant_sys_reg()

static int get_invariant_sys_reg	(	u64	id,
		u64 __user *	uaddr
	)

static

Definition at line 3595 of file sys_regs.c.

 {
     const struct sys_reg_desc *r;
  
     r = get_reg_by_id(id, invariant_sys_regs,
               ARRAY_SIZE(invariant_sys_regs));
     if (!r)
         return -ENOENT;
  
     return put_user(r->val, uaddr);
 }

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◆ get_min_cache_line_size()

static u8 get_min_cache_line_size ( bool icache )

static

Definition at line 221 of file sys_regs.c.

 {
     u64 ctr = read_sanitised_ftr_reg(SYS_CTR_EL0);
     u8 field;
  
     if (icache)
         field = SYS_FIELD_GET(CTR_EL0, IminLine, ctr);
     else
         field = SYS_FIELD_GET(CTR_EL0, DminLine, ctr);
  
     /*
      * Cache line size is represented as Log2(words) in CTR_EL0.
      * Log2(bytes) can be derived with the following:
      *
      * Log2(words) + 2 = Log2(bytes / 4) + 2
      *         = Log2(bytes) - 2 + 2
      *         = Log2(bytes)
      */
     return field + 2;
 }

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◆ get_pmcr()

static int get_pmcr	(	struct kvm_vcpu *	vcpu,
		const struct sys_reg_desc *	r,
		u64 *	val
	)

static

Definition at line 1262 of file sys_regs.c.

 {
     *val = kvm_vcpu_read_pmcr(vcpu);
     return 0;
 }

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◆ get_pmreg()

static int get_pmreg	(	struct kvm_vcpu *	vcpu,
		const struct sys_reg_desc *	r,
		u64 *	val
	)

static

Definition at line 1145 of file sys_regs.c.

 {
     u64 mask = kvm_pmu_valid_counter_mask(vcpu);
  
     *val = __vcpu_sys_reg(vcpu, r->reg) & mask;
     return 0;
 }

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◆ get_pmu_evcntr()

static int get_pmu_evcntr	(	struct kvm_vcpu *	vcpu,
		const struct sys_reg_desc *	r,
		u64 *	val
	)

static

Definition at line 1015 of file sys_regs.c.

 {
     u64 idx;
  
     if (r->CRn == 9 && r->CRm == 13 && r->Op2 == 0)
         /* PMCCNTR_EL0 */
         idx = ARMV8_PMU_CYCLE_IDX;
     else
         /* PMEVCNTRn_EL0 */
         idx = ((r->CRm & 3) << 3) | (r->Op2 & 7);
  
     *val = kvm_pmu_get_counter_value(vcpu, idx);
     return 0;
 }

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◆ get_raz_reg()

static int get_raz_reg	(	struct kvm_vcpu *	vcpu,
		const struct sys_reg_desc *	rd,
		u64 *	val
	)

static

Definition at line 1855 of file sys_regs.c.

 {
     *val = 0;
     return 0;
 }

◆ get_reg_by_id()

const struct sys_reg_desc* get_reg_by_id	(	u64	id,
		const struct sys_reg_desc	table[],
		unsigned int	num
	)

Definition at line 3528 of file sys_regs.c.

 {
     struct sys_reg_params params;
  
     if (!index_to_params(id, &params))
         return NULL;
  
     return find_reg(&params, table, num);
 }

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◆ get_wcr()

static int get_wcr	(	struct kvm_vcpu *	vcpu,
		const struct sys_reg_desc *	rd,
		u64 *	val
	)

static

Definition at line 789 of file sys_regs.c.

 {
     *val = vcpu->arch.vcpu_debug_state.dbg_wcr[rd->CRm];
     return 0;
 }

◆ get_wvr()

static int get_wvr	(	struct kvm_vcpu *	vcpu,
		const struct sys_reg_desc *	rd,
		u64 *	val
	)

static

Definition at line 752 of file sys_regs.c.

 {
     *val = vcpu->arch.vcpu_debug_state.dbg_wvr[rd->CRm];
     return 0;
 }

◆ hidden_user_visibility()

static unsigned int hidden_user_visibility	(	const struct kvm_vcpu *	vcpu,
		const struct sys_reg_desc *	rd
	)

static

Definition at line 2055 of file sys_regs.c.

 {
     return REG_HIDDEN_USER;
 }

◆ id_to_sys_reg_desc()

static const struct sys_reg_desc* id_to_sys_reg_desc	(	struct kvm_vcpu *	vcpu,
		u64	id,
		const struct sys_reg_desc	table[],
		unsigned int	num
	)

static

Definition at line 3542 of file sys_regs.c.

 {
     const struct sys_reg_desc *r;
  
     /* We only do sys_reg for now. */
     if ((id & KVM_REG_ARM_COPROC_MASK) != KVM_REG_ARM64_SYSREG)
         return NULL;
  
     r = get_reg_by_id(id, table, num);
  
     /* Not saved in the sys_reg array and not otherwise accessible? */
     if (r && (!(r->reg || r->get_user) || sysreg_hidden(vcpu, r)))
         r = NULL;
  
     return r;
 }

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◆ id_visibility()

static unsigned int id_visibility	(	const struct kvm_vcpu *	vcpu,
		const struct sys_reg_desc *	r
	)

static

Definition at line 1589 of file sys_regs.c.

 {
     u32 id = reg_to_encoding(r);
  
     switch (id) {
     case SYS_ID_AA64ZFR0_EL1:
         if (!vcpu_has_sve(vcpu))
             return REG_RAZ;
         break;
     }
  
     return 0;
 }

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◆ index_to_params()

static bool index_to_params	(	u64	id,
		struct sys_reg_params *	params
	)

static

Definition at line 3499 of file sys_regs.c.

 {
     switch (id & KVM_REG_SIZE_MASK) {
     case KVM_REG_SIZE_U64:
         /* Any unused index bits means it's not valid. */
         if (id & ~(KVM_REG_ARCH_MASK | KVM_REG_SIZE_MASK
                   | KVM_REG_ARM_COPROC_MASK
                   | KVM_REG_ARM64_SYSREG_OP0_MASK
                   | KVM_REG_ARM64_SYSREG_OP1_MASK
                   | KVM_REG_ARM64_SYSREG_CRN_MASK
                   | KVM_REG_ARM64_SYSREG_CRM_MASK
                   | KVM_REG_ARM64_SYSREG_OP2_MASK))
             return false;
         params->Op0 = ((id & KVM_REG_ARM64_SYSREG_OP0_MASK)
                    >> KVM_REG_ARM64_SYSREG_OP0_SHIFT);
         params->Op1 = ((id & KVM_REG_ARM64_SYSREG_OP1_MASK)
                    >> KVM_REG_ARM64_SYSREG_OP1_SHIFT);
         params->CRn = ((id & KVM_REG_ARM64_SYSREG_CRN_MASK)
                    >> KVM_REG_ARM64_SYSREG_CRN_SHIFT);
         params->CRm = ((id & KVM_REG_ARM64_SYSREG_CRM_MASK)
                    >> KVM_REG_ARM64_SYSREG_CRM_SHIFT);
         params->Op2 = ((id & KVM_REG_ARM64_SYSREG_OP2_MASK)
                    >> KVM_REG_ARM64_SYSREG_OP2_SHIFT);
         return true;
     default:
         return false;
     }
 }

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◆ is_aa32_id_reg()

static bool is_aa32_id_reg ( u32 id )

inlinestatic

Definition at line 1582 of file sys_regs.c.

 {
     return (sys_reg_Op0(id) == 3 && sys_reg_Op1(id) == 0 &&
         sys_reg_CRn(id) == 0 && sys_reg_CRm(id) >= 1 &&
         sys_reg_CRm(id) <= 3);
 }

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◆ is_feature_id_reg()

static bool is_feature_id_reg ( u32 encoding )

static

Definition at line 3881 of file sys_regs.c.

 {
     return (sys_reg_Op0(encoding) == 3 &&
         (sys_reg_Op1(encoding) < 2 || sys_reg_Op1(encoding) == 3) &&
         sys_reg_CRn(encoding) == 0 &&
         sys_reg_CRm(encoding) <= 7);
 }

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◆ is_id_reg()

static bool is_id_reg ( u32 id )

inlinestatic

Definition at line 1575 of file sys_regs.c.

 {
     return (sys_reg_Op0(id) == 3 && sys_reg_Op1(id) == 0 &&
         sys_reg_CRn(id) == 0 && sys_reg_CRm(id) >= 1 &&
         sys_reg_CRm(id) < 8);
 }

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◆ is_imp_def_sys_reg()

static bool is_imp_def_sys_reg ( struct sys_reg_params * params )

static

Definition at line 3387 of file sys_regs.c.

 {
     // See ARM DDI 0487E.a, section D12.3.2
     return params->Op0 == 3 && (params->CRn & 0b1011) == 0b1011;
 }

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◆ kvm_arm64_ftr_safe_value()

static s64 kvm_arm64_ftr_safe_value	(	u32	id,
		const struct arm64_ftr_bits *	ftrp,
		s64	new,
		s64	cur
	)

static

Definition at line 1412 of file sys_regs.c.

 {
     struct arm64_ftr_bits kvm_ftr = *ftrp;
  
     /* Some features have different safe value type in KVM than host features */
     switch (id) {
     case SYS_ID_AA64DFR0_EL1:
         switch (kvm_ftr.shift) {
         case ID_AA64DFR0_EL1_PMUVer_SHIFT:
             kvm_ftr.type = FTR_LOWER_SAFE;
             break;
         case ID_AA64DFR0_EL1_DebugVer_SHIFT:
             kvm_ftr.type = FTR_LOWER_SAFE;
             break;
         }
         break;
     case SYS_ID_DFR0_EL1:
         if (kvm_ftr.shift == ID_DFR0_EL1_PerfMon_SHIFT)
             kvm_ftr.type = FTR_LOWER_SAFE;
         break;
     }
  
     return arm64_ftr_safe_value(&kvm_ftr, new, cur);
 }

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◆ kvm_arm_copy_sys_reg_indices()

int kvm_arm_copy_sys_reg_indices	(	struct kvm_vcpu *	vcpu,
		u64 __user *	uindices
	)

Definition at line 3854 of file sys_regs.c.

 {
     unsigned int i;
     int err;
  
     /* Then give them all the invariant registers' indices. */
     for (i = 0; i < ARRAY_SIZE(invariant_sys_regs); i++) {
         if (put_user(sys_reg_to_index(&invariant_sys_regs[i]), uindices))
             return -EFAULT;
         uindices++;
     }
  
     err = walk_sys_regs(vcpu, uindices);
     if (err < 0)
         return err;
     uindices += err;
  
     return write_demux_regids(uindices);
 }

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◆ kvm_arm_num_sys_reg_descs()

unsigned long kvm_arm_num_sys_reg_descs ( struct kvm_vcpu * vcpu )

Definition at line 3847 of file sys_regs.c.

 {
     return ARRAY_SIZE(invariant_sys_regs)
         + num_demux_regs()
         + walk_sys_regs(vcpu, (u64 __user *)NULL);
 }

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◆ kvm_arm_sys_reg_get_reg()

int kvm_arm_sys_reg_get_reg	(	struct kvm_vcpu *	vcpu,
		const struct kvm_one_reg *	reg
	)

Definition at line 3705 of file sys_regs.c.

 {
     void __user *uaddr = (void __user *)(unsigned long)reg->addr;
     int err;
  
     if ((reg->id & KVM_REG_ARM_COPROC_MASK) == KVM_REG_ARM_DEMUX)
         return demux_c15_get(vcpu, reg->id, uaddr);
  
     err = get_invariant_sys_reg(reg->id, uaddr);
     if (err != -ENOENT)
         return err;
  
     return kvm_sys_reg_get_user(vcpu, reg,
                     sys_reg_descs, ARRAY_SIZE(sys_reg_descs));
 }

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◆ kvm_arm_sys_reg_set_reg()

int kvm_arm_sys_reg_set_reg	(	struct kvm_vcpu *	vcpu,
		const struct kvm_one_reg *	reg
	)

Definition at line 3749 of file sys_regs.c.

 {
     void __user *uaddr = (void __user *)(unsigned long)reg->addr;
     int err;
  
     if ((reg->id & KVM_REG_ARM_COPROC_MASK) == KVM_REG_ARM_DEMUX)
         return demux_c15_set(vcpu, reg->id, uaddr);
  
     err = set_invariant_sys_reg(reg->id, uaddr);
     if (err != -ENOENT)
         return err;
  
     return kvm_sys_reg_set_user(vcpu, reg,
                     sys_reg_descs, ARRAY_SIZE(sys_reg_descs));
 }

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◆ kvm_emulate_cp15_id_reg()

static int kvm_emulate_cp15_id_reg	(	struct kvm_vcpu *	vcpu,
		struct sys_reg_params *	params
	)

static

kvm_emulate_cp15_id_reg() - Handles an MRC trap on a guest CP15 access where CRn=0, which corresponds to the AArch32 feature registers. @vcpu: the vCPU pointer @params: the system register access parameters.

Our cp15 system register tables do not enumerate the AArch32 feature registers. Conveniently, our AArch64 table does, and the AArch32 system register encoding can be trivially remapped into the AArch64 for the feature registers: Append op0=3, leaving op1, CRn, CRm, and op2 the same.

According to DDI0487G.b G7.3.1, paragraph "Behavior of VMSAv8-32 32-bit System registers with (coproc=0b1111, CRn==c0)", read accesses from this range are either UNKNOWN or RES0. Rerouting remains architectural as we treat undefined registers in this range as RAZ.

Definition at line 3299 of file sys_regs.c.

 {
     int Rt = kvm_vcpu_sys_get_rt(vcpu);
  
     /* Treat impossible writes to RO registers as UNDEFINED */
     if (params->is_write) {
         unhandled_cp_access(vcpu, params);
         return 1;
     }
  
     params->Op0 = 3;
  
     /*
      * All registers where CRm > 3 are known to be UNKNOWN/RAZ from AArch32.
      * Avoid conflicting with future expansion of AArch64 feature registers
      * and simply treat them as RAZ here.
      */
     if (params->CRm > 3)
         params->regval = 0;
     else if (!emulate_sys_reg(vcpu, params))
         return 1;
  
     vcpu_set_reg(vcpu, Rt, params->regval);
     return 1;
 }

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◆ kvm_esr_cp10_id_to_sys64()

static bool kvm_esr_cp10_id_to_sys64	(	u64	esr,
		struct sys_reg_params *	params
	)

static

Definition at line 3216 of file sys_regs.c.

 {
     u8 reg_id = (esr >> 10) & 0xf;
     bool valid;
  
     params->is_write = ((esr & 1) == 0);
     params->Op0 = 3;
     params->Op1 = 0;
     params->CRn = 0;
     params->CRm = 3;
  
     /* CP10 ID registers are read-only */
     valid = !params->is_write;
  
     switch (reg_id) {
     /* MVFR0 */
     case 0b0111:
         params->Op2 = 0;
         break;
     /* MVFR1 */
     case 0b0110:
         params->Op2 = 1;
         break;
     /* MVFR2 */
     case 0b0101:
         params->Op2 = 2;
         break;
     default:
         valid = false;
     }
  
     if (valid)
         return true;
  
     kvm_pr_unimpl("Unhandled cp10 register %s: %u\n",
               params->is_write ? "write" : "read", reg_id);
     return false;
 }

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◆ kvm_handle_cp10_id()

int kvm_handle_cp10_id ( struct kvm_vcpu * vcpu )

kvm_handle_cp10_id() - Handles a VMRS trap on guest access to a 'Media and VFP Register' from AArch32. @vcpu: The vCPU pointer

MVFR{0-2} are architecturally mapped to the AArch64 MVFR{0-2}_EL1 registers. Work out the correct AArch64 system register encoding and reroute to the AArch64 system register emulation.

Definition at line 3264 of file sys_regs.c.

 {
     int Rt = kvm_vcpu_sys_get_rt(vcpu);
     u64 esr = kvm_vcpu_get_esr(vcpu);
     struct sys_reg_params params;
  
     /* UNDEF on any unhandled register access */
     if (!kvm_esr_cp10_id_to_sys64(esr, &params)) {
         kvm_inject_undefined(vcpu);
         return 1;
     }
  
     if (emulate_sys_reg(vcpu, &params))
         vcpu_set_reg(vcpu, Rt, params.regval);
  
     return 1;
 }

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◆ kvm_handle_cp14_32()

int kvm_handle_cp14_32 ( struct kvm_vcpu * vcpu )

Definition at line 3378 of file sys_regs.c.

 {
     struct sys_reg_params params;
  
     params = esr_cp1x_32_to_params(kvm_vcpu_get_esr(vcpu));
  
     return kvm_handle_cp_32(vcpu, &params, cp14_regs, ARRAY_SIZE(cp14_regs));
 }

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◆ kvm_handle_cp14_64()

int kvm_handle_cp14_64 ( struct kvm_vcpu * vcpu )

Definition at line 3373 of file sys_regs.c.

 {
     return kvm_handle_cp_64(vcpu, cp14_64_regs, ARRAY_SIZE(cp14_64_regs));
 }

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◆ kvm_handle_cp14_load_store()

int kvm_handle_cp14_load_store ( struct kvm_vcpu * vcpu )

Definition at line 3073 of file sys_regs.c.

 {
     kvm_inject_undefined(vcpu);
     return 1;
 }

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◆ kvm_handle_cp15_32()

int kvm_handle_cp15_32 ( struct kvm_vcpu * vcpu )

Definition at line 3355 of file sys_regs.c.

 {
     struct sys_reg_params params;
  
     params = esr_cp1x_32_to_params(kvm_vcpu_get_esr(vcpu));
  
     /*
      * Certain AArch32 ID registers are handled by rerouting to the AArch64
      * system register table. Registers in the ID range where CRm=0 are
      * excluded from this scheme as they do not trivially map into AArch64
      * system register encodings.
      */
     if (params.Op1 == 0 && params.CRn == 0 && params.CRm)
         return kvm_emulate_cp15_id_reg(vcpu, &params);
  
     return kvm_handle_cp_32(vcpu, &params, cp15_regs, ARRAY_SIZE(cp15_regs));
 }

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◆ kvm_handle_cp15_64()

int kvm_handle_cp15_64 ( struct kvm_vcpu * vcpu )

Definition at line 3350 of file sys_regs.c.

 {
     return kvm_handle_cp_64(vcpu, cp15_64_regs, ARRAY_SIZE(cp15_64_regs));
 }

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◆ kvm_handle_cp_32()

static int kvm_handle_cp_32	(	struct kvm_vcpu *	vcpu,
		struct sys_reg_params *	params,
		const struct sys_reg_desc *	global,
		size_t	nr_global
	)

static

kvm_handle_cp_32 – handles a mrc/mcr trap on a guest CP14/CP15 access @vcpu: The VCPU pointer @run: The kvm_run struct

Definition at line 3331 of file sys_regs.c.

 {
     int Rt  = kvm_vcpu_sys_get_rt(vcpu);
  
     params->regval = vcpu_get_reg(vcpu, Rt);
  
     if (emulate_cp(vcpu, params, global, nr_global)) {
         if (!params->is_write)
             vcpu_set_reg(vcpu, Rt, params->regval);
         return 1;
     }
  
     unhandled_cp_access(vcpu, params);
     return 1;
 }

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◆ kvm_handle_cp_64()

static int kvm_handle_cp_64	(	struct kvm_vcpu *	vcpu,
		const struct sys_reg_desc *	global,
		size_t	nr_global
	)

static

kvm_handle_cp_64 – handles a mrrc/mcrr trap on a guest CP14/CP15 access @vcpu: The VCPU pointer @run: The kvm_run struct

Definition at line 3164 of file sys_regs.c.

 {
     struct sys_reg_params params;
     u64 esr = kvm_vcpu_get_esr(vcpu);
     int Rt = kvm_vcpu_sys_get_rt(vcpu);
     int Rt2 = (esr >> 10) & 0x1f;
  
     params.CRm = (esr >> 1) & 0xf;
     params.is_write = ((esr & 1) == 0);
  
     params.Op0 = 0;
     params.Op1 = (esr >> 16) & 0xf;
     params.Op2 = 0;
     params.CRn = 0;
  
     /*
      * Make a 64-bit value out of Rt and Rt2. As we use the same trap
      * backends between AArch32 and AArch64, we get away with it.
      */
     if (params.is_write) {
         params.regval = vcpu_get_reg(vcpu, Rt) & 0xffffffff;
         params.regval |= vcpu_get_reg(vcpu, Rt2) << 32;
     }
  
     /*
      * If the table contains a handler, handle the
      * potential register operation in the case of a read and return
      * with success.
      */
     if (emulate_cp(vcpu, &params, global, nr_global)) {
         /* Split up the value between registers for the read side */
         if (!params.is_write) {
             vcpu_set_reg(vcpu, Rt, lower_32_bits(params.regval));
             vcpu_set_reg(vcpu, Rt2, upper_32_bits(params.regval));
         }
  
         return 1;
     }
  
     unhandled_cp_access(vcpu, &params);
     return 1;
 }

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◆ kvm_handle_sys_reg()

int kvm_handle_sys_reg ( struct kvm_vcpu * vcpu )

kvm_handle_sys_reg – handles a mrs/msr trap on a guest sys_reg access @vcpu: The VCPU pointer

Definition at line 3473 of file sys_regs.c.

 {
     struct sys_reg_params params;
     unsigned long esr = kvm_vcpu_get_esr(vcpu);
     int Rt = kvm_vcpu_sys_get_rt(vcpu);
  
     trace_kvm_handle_sys_reg(esr);
  
     if (__check_nv_sr_forward(vcpu))
         return 1;
  
     params = esr_sys64_to_params(esr);
     params.regval = vcpu_get_reg(vcpu, Rt);
  
     if (!emulate_sys_reg(vcpu, &params))
         return 1;
  
     if (!params.is_write)
         vcpu_set_reg(vcpu, Rt, params.regval);
     return 1;
 }

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◆ kvm_read_sanitised_id_reg()

static u64 kvm_read_sanitised_id_reg	(	struct kvm_vcpu *	vcpu,
		const struct sys_reg_desc *	r
	)

static

Definition at line 1560 of file sys_regs.c.

 {
     return __kvm_read_sanitised_id_reg(vcpu, r);
 }

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◆ kvm_reset_id_regs()

static void kvm_reset_id_regs ( struct kvm_vcpu * vcpu )

static

Definition at line 3423 of file sys_regs.c.

 {
     const struct sys_reg_desc *idreg = first_idreg;
     u32 id = reg_to_encoding(idreg);
     struct kvm *kvm = vcpu->kvm;
  
     if (test_bit(KVM_ARCH_FLAG_ID_REGS_INITIALIZED, &kvm->arch.flags))
         return;
  
     lockdep_assert_held(&kvm->arch.config_lock);
  
     /* Initialize all idregs */
     while (is_id_reg(id)) {
         IDREG(kvm, id) = idreg->reset(vcpu, idreg);
  
         idreg++;
         id = reg_to_encoding(idreg);
     }
  
     set_bit(KVM_ARCH_FLAG_ID_REGS_INITIALIZED, &kvm->arch.flags);
 }

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◆ kvm_reset_sys_regs()

void kvm_reset_sys_regs ( struct kvm_vcpu * vcpu )

kvm_reset_sys_regs - sets system registers to reset value @vcpu: The VCPU pointer

This function finds the right table above and sets the registers on the virtual CPU struct to their architecturally defined reset values.

Definition at line 3452 of file sys_regs.c.

 {
     unsigned long i;
  
     kvm_reset_id_regs(vcpu);
  
     for (i = 0; i < ARRAY_SIZE(sys_reg_descs); i++) {
         const struct sys_reg_desc *r = &sys_reg_descs[i];
  
         if (is_id_reg(reg_to_encoding(r)))
             continue;
  
         if (r->reset)
             r->reset(vcpu, r);
     }
 }

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◆ kvm_sys_reg_get_user()

int kvm_sys_reg_get_user	(	struct kvm_vcpu *	vcpu,
		const struct kvm_one_reg *	reg,
		const struct sys_reg_desc	table[],
		unsigned int	num
	)

Definition at line 3680 of file sys_regs.c.

 {
     u64 __user *uaddr = (u64 __user *)(unsigned long)reg->addr;
     const struct sys_reg_desc *r;
     u64 val;
     int ret;
  
     r = id_to_sys_reg_desc(vcpu, reg->id, table, num);
     if (!r || sysreg_hidden_user(vcpu, r))
         return -ENOENT;
  
     if (r->get_user) {
         ret = (r->get_user)(vcpu, r, &val);
     } else {
         val = __vcpu_sys_reg(vcpu, r->reg);
         ret = 0;
     }
  
     if (!ret)
         ret = put_user(val, uaddr);
  
     return ret;
 }

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◆ kvm_sys_reg_set_user()

int kvm_sys_reg_set_user	(	struct kvm_vcpu *	vcpu,
		const struct kvm_one_reg *	reg,
		const struct sys_reg_desc	table[],
		unsigned int	num
	)

Definition at line 3721 of file sys_regs.c.

 {
     u64 __user *uaddr = (u64 __user *)(unsigned long)reg->addr;
     const struct sys_reg_desc *r;
     u64 val;
     int ret;
  
     if (get_user(val, uaddr))
         return -EFAULT;
  
     r = id_to_sys_reg_desc(vcpu, reg->id, table, num);
     if (!r || sysreg_hidden_user(vcpu, r))
         return -ENOENT;
  
     if (sysreg_user_write_ignore(vcpu, r))
         return 0;
  
     if (r->set_user) {
         ret = (r->set_user)(vcpu, r, val);
     } else {
         __vcpu_sys_reg(vcpu, r->reg) = val;
         ret = 0;
     }
  
     return ret;
 }

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◆ kvm_sys_reg_table_init()

int __init kvm_sys_reg_table_init ( void )

Definition at line 3933 of file sys_regs.c.

 {
     struct sys_reg_params params;
     bool valid = true;
     unsigned int i;
  
     /* Make sure tables are unique and in order. */
     valid &= check_sysreg_table(sys_reg_descs, ARRAY_SIZE(sys_reg_descs), false);
     valid &= check_sysreg_table(cp14_regs, ARRAY_SIZE(cp14_regs), true);
     valid &= check_sysreg_table(cp14_64_regs, ARRAY_SIZE(cp14_64_regs), true);
     valid &= check_sysreg_table(cp15_regs, ARRAY_SIZE(cp15_regs), true);
     valid &= check_sysreg_table(cp15_64_regs, ARRAY_SIZE(cp15_64_regs), true);
     valid &= check_sysreg_table(invariant_sys_regs, ARRAY_SIZE(invariant_sys_regs), false);
  
     if (!valid)
         return -EINVAL;
  
     /* We abuse the reset function to overwrite the table itself. */
     for (i = 0; i < ARRAY_SIZE(invariant_sys_regs); i++)
         invariant_sys_regs[i].reset(NULL, &invariant_sys_regs[i]);
  
     /* Find the first idreg (SYS_ID_PFR0_EL1) in sys_reg_descs. */
     params = encoding_to_params(SYS_ID_PFR0_EL1);
     first_idreg = find_reg(&params, sys_reg_descs, ARRAY_SIZE(sys_reg_descs));
     if (!first_idreg)
         return -EINVAL;
  
     if (kvm_get_mode() == KVM_MODE_NV)
         return populate_nv_trap_config();
  
     return 0;
 }

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◆ kvm_vm_ioctl_get_reg_writable_masks()

int kvm_vm_ioctl_get_reg_writable_masks	(	struct kvm *	kvm,
		struct reg_mask_range *	range
	)

Definition at line 3889 of file sys_regs.c.

 {
     const void *zero_page = page_to_virt(ZERO_PAGE(0));
     u64 __user *masks = (u64 __user *)range->addr;
  
     /* Only feature id range is supported, reserved[13] must be zero. */
     if (range->range ||
         memcmp(range->reserved, zero_page, sizeof(range->reserved)))
         return -EINVAL;
  
     /* Wipe the whole thing first */
     if (clear_user(masks, KVM_ARM_FEATURE_ID_RANGE_SIZE * sizeof(__u64)))
         return -EFAULT;
  
     for (int i = 0; i < ARRAY_SIZE(sys_reg_descs); i++) {
         const struct sys_reg_desc *reg = &sys_reg_descs[i];
         u32 encoding = reg_to_encoding(reg);
         u64 val;
  
         if (!is_feature_id_reg(encoding) || !reg->set_user)
             continue;
  
         /*
          * For ID registers, we return the writable mask. Other feature
          * registers return a full 64bit mask. That's not necessary
          * compliant with a given revision of the architecture, but the
          * RES0/RES1 definitions allow us to do that.
          */
         if (is_id_reg(encoding)) {
             if (!reg->val ||
                 (is_aa32_id_reg(encoding) && !kvm_supports_32bit_el0()))
                 continue;
             val = reg->val;
         } else {
             val = ~0UL;
         }
  
         if (put_user(val, (masks + KVM_ARM_FEATURE_ID_RANGE_INDEX(encoding))))
             return -EFAULT;
     }
  
     return 0;
 }

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◆ mte_visibility()

static unsigned int mte_visibility	(	const struct kvm_vcpu *	vcpu,
		const struct sys_reg_desc *	rd
	)

static

Definition at line 1986 of file sys_regs.c.

 {
     if (kvm_has_mte(vcpu->kvm))
         return 0;
  
     return REG_HIDDEN;
 }

◆ num_demux_regs()

static unsigned int num_demux_regs ( void )

static

Definition at line 3765 of file sys_regs.c.

 {
     return CSSELR_MAX;
 }

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◆ perform_access()

static void perform_access	(	struct kvm_vcpu *	vcpu,
		struct sys_reg_params *	params,
		const struct sys_reg_desc *	r
	)

static

Definition at line 3079 of file sys_regs.c.

 {
     trace_kvm_sys_access(*vcpu_pc(vcpu), params, r);
  
     /* Check for regs disabled by runtime config */
     if (sysreg_hidden(vcpu, r)) {
         kvm_inject_undefined(vcpu);
         return;
     }
  
     /*
      * Not having an accessor means that we have configured a trap
      * that we don't know how to handle. This certainly qualifies
      * as a gross bug that should be fixed right away.
      */
     BUG_ON(!r->access);
  
     /* Skip instruction if instructed so */
     if (likely(r->access(vcpu, params, r)))
         kvm_incr_pc(vcpu);
 }

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◆ pmu_access_cycle_counter_el0_disabled()

static bool pmu_access_cycle_counter_el0_disabled ( struct kvm_vcpu * vcpu )

static

Definition at line 925 of file sys_regs.c.

 {
     return check_pmu_access_disabled(vcpu, ARMV8_PMU_USERENR_CR | ARMV8_PMU_USERENR_EN);
 }

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◆ pmu_access_el0_disabled()

static bool pmu_access_el0_disabled ( struct kvm_vcpu * vcpu )

static

Definition at line 915 of file sys_regs.c.

 {
     return check_pmu_access_disabled(vcpu, ARMV8_PMU_USERENR_EN);
 }

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◆ pmu_access_event_counter_el0_disabled()

static bool pmu_access_event_counter_el0_disabled ( struct kvm_vcpu * vcpu )

static

Definition at line 930 of file sys_regs.c.

 {
     return check_pmu_access_disabled(vcpu, ARMV8_PMU_USERENR_ER | ARMV8_PMU_USERENR_EN);
 }

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◆ pmu_counter_idx_valid()

static bool pmu_counter_idx_valid	(	struct kvm_vcpu *	vcpu,
		u64	idx
	)

static

Definition at line 1001 of file sys_regs.c.

 {
     u64 pmcr, val;
  
     pmcr = kvm_vcpu_read_pmcr(vcpu);
     val = FIELD_GET(ARMV8_PMU_PMCR_N, pmcr);
     if (idx >= val && idx != ARMV8_PMU_CYCLE_IDX) {
         kvm_inject_undefined(vcpu);
         return false;
     }
  
     return true;
 }

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◆ pmu_visibility()

static unsigned int pmu_visibility	(	const struct kvm_vcpu *	vcpu,
		const struct sys_reg_desc *	r
	)

static

Definition at line 837 of file sys_regs.c.

 {
     if (kvm_vcpu_has_pmu(vcpu))
         return 0;
  
     return REG_HIDDEN;
 }

◆ pmu_write_swinc_el0_disabled()

static bool pmu_write_swinc_el0_disabled ( struct kvm_vcpu * vcpu )

static

Definition at line 920 of file sys_regs.c.

 {
     return check_pmu_access_disabled(vcpu, ARMV8_PMU_USERENR_SW | ARMV8_PMU_USERENR_EN);
 }

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◆ pmuver_to_perfmon()

static u8 pmuver_to_perfmon ( u8 pmuver )

static

Definition at line 1503 of file sys_regs.c.

 {
     switch (pmuver) {
     case ID_AA64DFR0_EL1_PMUVer_IMP:
         return ID_DFR0_EL1_PerfMon_PMUv3;
     case ID_AA64DFR0_EL1_PMUVer_IMP_DEF:
         return ID_DFR0_EL1_PerfMon_IMPDEF;
     default:
         /* Anything ARMv8.1+ and NI have the same value. For now. */
         return pmuver;
     }
 }

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◆ ptrauth_visibility()

static unsigned int ptrauth_visibility	(	const struct kvm_vcpu *	vcpu,
		const struct sys_reg_desc *	rd
	)

static

Definition at line 1348 of file sys_regs.c.

 {
     return vcpu_has_ptrauth(vcpu) ? 0 : REG_HIDDEN;
 }

◆ raz_visibility()

static unsigned int raz_visibility	(	const struct kvm_vcpu *	vcpu,
		const struct sys_reg_desc *	r
	)

static

Definition at line 1618 of file sys_regs.c.

 {
     return REG_RAZ;
 }

◆ read_from_write_only()

static bool read_from_write_only	(	struct kvm_vcpu *	vcpu,
		struct sys_reg_params *	params,
		const struct sys_reg_desc *	r
	)

static

Definition at line 59 of file sys_regs.c.

 {
     return bad_trap(vcpu, params, r,
             "sys_reg read to write-only register");
 }

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◆ read_id_reg()

static u64 read_id_reg	(	const struct kvm_vcpu *	vcpu,
		const struct sys_reg_desc *	r
	)

static

Definition at line 1566 of file sys_regs.c.

 {
     return IDREG(vcpu->kvm, reg_to_encoding(r));
 }

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◆ read_sanitised_id_aa64dfr0_el1()

static u64 read_sanitised_id_aa64dfr0_el1	(	struct kvm_vcpu *	vcpu,
		const struct sys_reg_desc *	rd
	)

static

Definition at line 1692 of file sys_regs.c.

 {
     u64 val = read_sanitised_ftr_reg(SYS_ID_AA64DFR0_EL1);
  
     val = ID_REG_LIMIT_FIELD_ENUM(val, ID_AA64DFR0_EL1, DebugVer, V8P8);
  
     /*
      * Only initialize the PMU version if the vCPU was configured with one.
      */
     val &= ~ID_AA64DFR0_EL1_PMUVer_MASK;
     if (kvm_vcpu_has_pmu(vcpu))
         val |= SYS_FIELD_PREP(ID_AA64DFR0_EL1, PMUVer,
                       kvm_arm_pmu_get_pmuver_limit());
  
     /* Hide SPE from guests */
     val &= ~ID_AA64DFR0_EL1_PMSVer_MASK;
  
     return val;
 }

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◆ read_sanitised_id_aa64pfr0_el1()

static u64 read_sanitised_id_aa64pfr0_el1	(	struct kvm_vcpu *	vcpu,
		const struct sys_reg_desc *	rd
	)

static

Definition at line 1648 of file sys_regs.c.

 {
     u64 val = read_sanitised_ftr_reg(SYS_ID_AA64PFR0_EL1);
  
     if (!vcpu_has_sve(vcpu))
         val &= ~ID_AA64PFR0_EL1_SVE_MASK;
  
     /*
      * The default is to expose CSV2 == 1 if the HW isn't affected.
      * Although this is a per-CPU feature, we make it global because
      * asymmetric systems are just a nuisance.
      *
      * Userspace can override this as long as it doesn't promise
      * the impossible.
      */
     if (arm64_get_spectre_v2_state() == SPECTRE_UNAFFECTED) {
         val &= ~ID_AA64PFR0_EL1_CSV2_MASK;
         val |= SYS_FIELD_PREP_ENUM(ID_AA64PFR0_EL1, CSV2, IMP);
     }
     if (arm64_get_meltdown_state() == SPECTRE_UNAFFECTED) {
         val &= ~ID_AA64PFR0_EL1_CSV3_MASK;
         val |= SYS_FIELD_PREP_ENUM(ID_AA64PFR0_EL1, CSV3, IMP);
     }
  
     if (kvm_vgic_global_state.type == VGIC_V3) {
         val &= ~ID_AA64PFR0_EL1_GIC_MASK;
         val |= SYS_FIELD_PREP_ENUM(ID_AA64PFR0_EL1, GIC, IMP);
     }
  
     val &= ~ID_AA64PFR0_EL1_AMU_MASK;
  
     return val;
 }

◆ read_sanitised_id_dfr0_el1()

static u64 read_sanitised_id_dfr0_el1	(	struct kvm_vcpu *	vcpu,
		const struct sys_reg_desc *	rd
	)

static

Definition at line 1747 of file sys_regs.c.

 {
     u8 perfmon = pmuver_to_perfmon(kvm_arm_pmu_get_pmuver_limit());
     u64 val = read_sanitised_ftr_reg(SYS_ID_DFR0_EL1);
  
     val &= ~ID_DFR0_EL1_PerfMon_MASK;
     if (kvm_vcpu_has_pmu(vcpu))
         val |= SYS_FIELD_PREP(ID_DFR0_EL1, PerfMon, perfmon);
  
     val = ID_REG_LIMIT_FIELD_ENUM(val, ID_DFR0_EL1, CopDbg, Debugv8p8);
  
     return val;
 }

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◆ reg_to_dbg()

static void reg_to_dbg	(	struct kvm_vcpu *	vcpu,
		struct sys_reg_params *	p,
		const struct sys_reg_desc *	rd,
		u64 *	dbg_reg
	)

static

Definition at line 626 of file sys_regs.c.

 {
     u64 mask, shift, val;
  
     get_access_mask(rd, &mask, &shift);
  
     val = *dbg_reg;
     val &= ~mask;
     val |= (p->regval & (mask >> shift)) << shift;
     *dbg_reg = val;
  
     vcpu_set_flag(vcpu, DEBUG_DIRTY);
 }

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◆ reset_actlr()

static u64 reset_actlr	(	struct kvm_vcpu *	vcpu,
		const struct sys_reg_desc *	r
	)

static

Definition at line 810 of file sys_regs.c.

 {
     u64 actlr = read_sysreg(actlr_el1);
     vcpu_write_sys_reg(vcpu, actlr, ACTLR_EL1);
     return actlr;
 }

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◆ reset_amair_el1()

static u64 reset_amair_el1	(	struct kvm_vcpu *	vcpu,
		const struct sys_reg_desc *	r
	)

static

Definition at line 803 of file sys_regs.c.

 {
     u64 amair = read_sysreg(amair_el1);
     vcpu_write_sys_reg(vcpu, amair, AMAIR_EL1);
     return amair;
 }

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◆ reset_bcr()

static u64 reset_bcr	(	struct kvm_vcpu *	vcpu,
		const struct sys_reg_desc *	rd
	)

static

Definition at line 721 of file sys_regs.c.

 {
     vcpu->arch.vcpu_debug_state.dbg_bcr[rd->CRm] = rd->val;
     return rd->val;
 }

◆ reset_bvr()

static u64 reset_bvr	(	struct kvm_vcpu *	vcpu,
		const struct sys_reg_desc *	rd
	)

static

Definition at line 684 of file sys_regs.c.

 {
     vcpu->arch.vcpu_debug_state.dbg_bvr[rd->CRm] = rd->val;
     return rd->val;
 }

◆ reset_clidr()

static u64 reset_clidr	(	struct kvm_vcpu *	vcpu,
		const struct sys_reg_desc *	r
	)

static

Definition at line 1892 of file sys_regs.c.

 {
     u64 ctr_el0 = read_sanitised_ftr_reg(SYS_CTR_EL0);
     u64 clidr;
     u8 loc;
  
     if ((ctr_el0 & CTR_EL0_IDC)) {
         /*
          * Data cache clean to the PoU is not required so LoUU and LoUIS
          * will not be set and a unified cache, which will be marked as
          * LoC, will be added.
          *
          * If not DIC, let the unified cache L2 so that an instruction
          * cache can be added as L1 later.
          */
         loc = (ctr_el0 & CTR_EL0_DIC) ? 1 : 2;
         clidr = CACHE_TYPE_UNIFIED << CLIDR_CTYPE_SHIFT(loc);
     } else {
         /*
          * Data cache clean to the PoU is required so let L1 have a data
          * cache and mark it as LoUU and LoUIS. As L1 has a data cache,
          * it can be marked as LoC too.
          */
         loc = 1;
         clidr = 1 << CLIDR_LOUU_SHIFT;
         clidr |= 1 << CLIDR_LOUIS_SHIFT;
         clidr |= CACHE_TYPE_DATA << CLIDR_CTYPE_SHIFT(1);
     }
  
     /*
      * Instruction cache invalidation to the PoU is required so let L1 have
      * an instruction cache. If L1 already has a data cache, it will be
      * CACHE_TYPE_SEPARATE.
      */
     if (!(ctr_el0 & CTR_EL0_DIC))
         clidr |= CACHE_TYPE_INST << CLIDR_CTYPE_SHIFT(1);
  
     clidr |= loc << CLIDR_LOC_SHIFT;
  
     /*
      * Add tag cache unified to data cache. Allocation tags and data are
      * unified in a cache line so that it looks valid even if there is only
      * one cache line.
      */
     if (kvm_has_mte(vcpu->kvm))
         clidr |= 2 << CLIDR_TTYPE_SHIFT(loc);
  
     __vcpu_sys_reg(vcpu, r->reg) = clidr;
  
     return __vcpu_sys_reg(vcpu, r->reg);
 }

◆ reset_mpidr()

static u64 reset_mpidr	(	struct kvm_vcpu *	vcpu,
		const struct sys_reg_desc *	r
	)

static

Definition at line 817 of file sys_regs.c.

 {
     u64 mpidr;
  
     /*
      * Map the vcpu_id into the first three affinity level fields of
      * the MPIDR. We limit the number of VCPUs in level 0 due to a
      * limitation to 16 CPUs in that level in the ICC_SGIxR registers
      * of the GICv3 to be able to address each CPU directly when
      * sending IPIs.
      */
     mpidr = (vcpu->vcpu_id & 0x0f) << MPIDR_LEVEL_SHIFT(0);
     mpidr |= ((vcpu->vcpu_id >> 4) & 0xff) << MPIDR_LEVEL_SHIFT(1);
     mpidr |= ((vcpu->vcpu_id >> 12) & 0xff) << MPIDR_LEVEL_SHIFT(2);
     mpidr |= (1ULL << 31);
     vcpu_write_sys_reg(vcpu, mpidr, MPIDR_EL1);
  
     return mpidr;
 }

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◆ reset_pmcr()

static u64 reset_pmcr	(	struct kvm_vcpu *	vcpu,
		const struct sys_reg_desc *	r
	)

static

Definition at line 888 of file sys_regs.c.

 {
     u64 pmcr = 0;
  
     if (!kvm_supports_32bit_el0())
         pmcr |= ARMV8_PMU_PMCR_LC;
  
     /*
      * The value of PMCR.N field is included when the
      * vCPU register is read via kvm_vcpu_read_pmcr().
      */
     __vcpu_sys_reg(vcpu, r->reg) = pmcr;
  
     return __vcpu_sys_reg(vcpu, r->reg);
 }

◆ reset_pmevcntr()

static u64 reset_pmevcntr	(	struct kvm_vcpu *	vcpu,
		const struct sys_reg_desc *	r
	)

static

Definition at line 860 of file sys_regs.c.

 {
     reset_unknown(vcpu, r);
     __vcpu_sys_reg(vcpu, r->reg) &= GENMASK(31, 0);
  
     return __vcpu_sys_reg(vcpu, r->reg);
 }

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◆ reset_pmevtyper()

static u64 reset_pmevtyper	(	struct kvm_vcpu *	vcpu,
		const struct sys_reg_desc *	r
	)

static

Definition at line 868 of file sys_regs.c.

 {
     /* This thing will UNDEF, who cares about the reset value? */
     if (!kvm_vcpu_has_pmu(vcpu))
         return 0;
  
     reset_unknown(vcpu, r);
     __vcpu_sys_reg(vcpu, r->reg) &= kvm_pmu_evtyper_mask(vcpu->kvm);
  
     return __vcpu_sys_reg(vcpu, r->reg);
 }

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◆ reset_pmselr()

static u64 reset_pmselr	(	struct kvm_vcpu *	vcpu,
		const struct sys_reg_desc *	r
	)

static

Definition at line 880 of file sys_regs.c.

 {
     reset_unknown(vcpu, r);
     __vcpu_sys_reg(vcpu, r->reg) &= ARMV8_PMU_COUNTER_MASK;
  
     return __vcpu_sys_reg(vcpu, r->reg);
 }

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◆ reset_pmu_reg()

static u64 reset_pmu_reg	(	struct kvm_vcpu *	vcpu,
		const struct sys_reg_desc *	r
	)

static

Definition at line 846 of file sys_regs.c.

 {
     u64 mask = BIT(ARMV8_PMU_CYCLE_IDX);
     u8 n = vcpu->kvm->arch.pmcr_n;
  
     if (n)
         mask |= GENMASK(n - 1, 0);
  
     reset_unknown(vcpu, r);
     __vcpu_sys_reg(vcpu, r->reg) &= mask;
  
     return __vcpu_sys_reg(vcpu, r->reg);
 }

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◆ reset_wcr()

static u64 reset_wcr	(	struct kvm_vcpu *	vcpu,
		const struct sys_reg_desc *	rd
	)

static

Definition at line 796 of file sys_regs.c.

 {
     vcpu->arch.vcpu_debug_state.dbg_wcr[rd->CRm] = rd->val;
     return rd->val;
 }

◆ reset_wvr()

static u64 reset_wvr	(	struct kvm_vcpu *	vcpu,
		const struct sys_reg_desc *	rd
	)

static

Definition at line 759 of file sys_regs.c.

 {
     vcpu->arch.vcpu_debug_state.dbg_wvr[rd->CRm] = rd->val;
     return rd->val;
 }

◆ set_bcr()

static int set_bcr	(	struct kvm_vcpu *	vcpu,
		const struct sys_reg_desc *	rd,
		u64	val
	)

static

Definition at line 707 of file sys_regs.c.

 {
     vcpu->arch.vcpu_debug_state.dbg_bcr[rd->CRm] = val;
     return 0;
 }

◆ set_bvr()

static int set_bvr	(	struct kvm_vcpu *	vcpu,
		const struct sys_reg_desc *	rd,
		u64	val
	)

static

Definition at line 670 of file sys_regs.c.

 {
     vcpu->arch.vcpu_debug_state.dbg_bvr[rd->CRm] = val;
     return 0;
 }

◆ set_ccsidr()

static int set_ccsidr	(	struct kvm_vcpu *	vcpu,
		u32	csselr,
		u32	val
	)

static

Definition at line 278 of file sys_regs.c.

 {
     u8 line_size = FIELD_GET(CCSIDR_EL1_LineSize, val) + 4;
     u32 *ccsidr = vcpu->arch.ccsidr;
     u32 i;
  
     if ((val & CCSIDR_EL1_RES0) ||
         line_size < get_min_cache_line_size(csselr & CSSELR_EL1_InD))
         return -EINVAL;
  
     if (!ccsidr) {
         if (val == get_ccsidr(vcpu, csselr))
             return 0;
  
         ccsidr = kmalloc_array(CSSELR_MAX, sizeof(u32), GFP_KERNEL_ACCOUNT);
         if (!ccsidr)
             return -ENOMEM;
  
         for (i = 0; i < CSSELR_MAX; i++)
             ccsidr[i] = get_ccsidr(vcpu, i);
  
         vcpu->arch.ccsidr = ccsidr;
     }
  
     ccsidr[csselr] = val;
  
     return 0;
 }

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◆ set_clidr()

static int set_clidr	(	struct kvm_vcpu *	vcpu,
		const struct sys_reg_desc *	rd,
		u64	val
	)

static

Definition at line 1944 of file sys_regs.c.

 {
     u64 ctr_el0 = read_sanitised_ftr_reg(SYS_CTR_EL0);
     u64 idc = !CLIDR_LOC(val) || (!CLIDR_LOUIS(val) && !CLIDR_LOUU(val));
  
     if ((val & CLIDR_EL1_RES0) || (!(ctr_el0 & CTR_EL0_IDC) && idc))
         return -EINVAL;
  
     __vcpu_sys_reg(vcpu, rd->reg) = val;
  
     return 0;
 }

◆ set_id_aa64dfr0_el1()

static int set_id_aa64dfr0_el1	(	struct kvm_vcpu *	vcpu,
		const struct sys_reg_desc *	rd,
		u64	val
	)

static

Definition at line 1713 of file sys_regs.c.

 {
     u8 debugver = SYS_FIELD_GET(ID_AA64DFR0_EL1, DebugVer, val);
     u8 pmuver = SYS_FIELD_GET(ID_AA64DFR0_EL1, PMUVer, val);
  
     /*
      * Prior to commit 3d0dba5764b9 ("KVM: arm64: PMU: Move the
      * ID_AA64DFR0_EL1.PMUver limit to VM creation"), KVM erroneously
      * exposed an IMP_DEF PMU to userspace and the guest on systems w/
      * non-architectural PMUs. Of course, PMUv3 is the only game in town for
      * PMU virtualization, so the IMP_DEF value was rather user-hostile.
      *
      * At minimum, we're on the hook to allow values that were given to
      * userspace by KVM. Cover our tracks here and replace the IMP_DEF value
      * with a more sensible NI. The value of an ID register changing under
      * the nose of the guest is unfortunate, but is certainly no more
      * surprising than an ill-guided PMU driver poking at impdef system
      * registers that end in an UNDEF...
      */
     if (pmuver == ID_AA64DFR0_EL1_PMUVer_IMP_DEF)
         val &= ~ID_AA64DFR0_EL1_PMUVer_MASK;
  
     /*
      * ID_AA64DFR0_EL1.DebugVer is one of those awkward fields with a
      * nonzero minimum safe value.
      */
     if (debugver < ID_AA64DFR0_EL1_DebugVer_IMP)
         return -EINVAL;
  
     return set_id_reg(vcpu, rd, val);
 }

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◆ set_id_dfr0_el1()

static int set_id_dfr0_el1	(	struct kvm_vcpu *	vcpu,
		const struct sys_reg_desc *	rd,
		u64	val
	)

static

Definition at line 1762 of file sys_regs.c.

 {
     u8 perfmon = SYS_FIELD_GET(ID_DFR0_EL1, PerfMon, val);
     u8 copdbg = SYS_FIELD_GET(ID_DFR0_EL1, CopDbg, val);
  
     if (perfmon == ID_DFR0_EL1_PerfMon_IMPDEF) {
         val &= ~ID_DFR0_EL1_PerfMon_MASK;
         perfmon = 0;
     }
  
     /*
      * Allow DFR0_EL1.PerfMon to be set from userspace as long as
      * it doesn't promise more than what the HW gives us on the
      * AArch64 side (as everything is emulated with that), and
      * that this is a PMUv3.
      */
     if (perfmon != 0 && perfmon < ID_DFR0_EL1_PerfMon_PMUv3)
         return -EINVAL;
  
     if (copdbg < ID_DFR0_EL1_CopDbg_Armv8)
         return -EINVAL;
  
     return set_id_reg(vcpu, rd, val);
 }

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◆ set_id_reg()

static int set_id_reg	(	struct kvm_vcpu *	vcpu,
		const struct sys_reg_desc *	rd,
		u64	val
	)

static

Definition at line 1815 of file sys_regs.c.

 {
     u32 id = reg_to_encoding(rd);
     int ret;
  
     mutex_lock(&vcpu->kvm->arch.config_lock);
  
     /*
      * Once the VM has started the ID registers are immutable. Reject any
      * write that does not match the final register value.
      */
     if (kvm_vm_has_ran_once(vcpu->kvm)) {
         if (val != read_id_reg(vcpu, rd))
             ret = -EBUSY;
         else
             ret = 0;
  
         mutex_unlock(&vcpu->kvm->arch.config_lock);
         return ret;
     }
  
     ret = arm64_check_features(vcpu, rd, val);
     if (!ret)
         IDREG(vcpu->kvm, id) = val;
  
     mutex_unlock(&vcpu->kvm->arch.config_lock);
  
     /*
      * arm64_check_features() returns -E2BIG to indicate the register's
      * feature set is a superset of the maximally-allowed register value.
      * While it would be nice to precisely describe this to userspace, the
      * existing UAPI for KVM_SET_ONE_REG has it that invalid register
      * writes return -EINVAL.
      */
     if (ret == -E2BIG)
         ret = -EINVAL;
     return ret;
 }

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◆ set_invariant_sys_reg()

static int set_invariant_sys_reg	(	u64	id,
		u64 __user *	uaddr
	)

static

Definition at line 3607 of file sys_regs.c.

 {
     const struct sys_reg_desc *r;
     u64 val;
  
     r = get_reg_by_id(id, invariant_sys_regs,
               ARRAY_SIZE(invariant_sys_regs));
     if (!r)
         return -ENOENT;
  
     if (get_user(val, uaddr))
         return -EFAULT;
  
     /* This is what we mean by invariant: you can't change it. */
     if (r->val != val)
         return -EINVAL;
  
     return 0;
 }

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◆ set_oslsr_el1()

static int set_oslsr_el1	(	struct kvm_vcpu *	vcpu,
		const struct sys_reg_desc *	rd,
		u64	val
	)

static

Definition at line 551 of file sys_regs.c.

 {
     /*
      * The only modifiable bit is the OSLK bit. Refuse the write if
      * userspace attempts to change any other bit in the register.
      */
     if ((val ^ rd->val) & ~OSLSR_EL1_OSLK)
         return -EINVAL;
  
     __vcpu_sys_reg(vcpu, rd->reg) = val;
     return 0;
 }

◆ set_pmcr()

static int set_pmcr	(	struct kvm_vcpu *	vcpu,
		const struct sys_reg_desc *	r,
		u64	val
	)

static

Definition at line 1269 of file sys_regs.c.

 {
     u8 new_n = FIELD_GET(ARMV8_PMU_PMCR_N, val);
     struct kvm *kvm = vcpu->kvm;
  
     mutex_lock(&kvm->arch.config_lock);
  
     /*
      * The vCPU can't have more counters than the PMU hardware
      * implements. Ignore this error to maintain compatibility
      * with the existing KVM behavior.
      */
     if (!kvm_vm_has_ran_once(kvm) &&
         new_n <= kvm_arm_pmu_get_max_counters(kvm))
         kvm->arch.pmcr_n = new_n;
  
     mutex_unlock(&kvm->arch.config_lock);
  
     /*
      * Ignore writes to RES0 bits, read only bits that are cleared on
      * vCPU reset, and writable bits that KVM doesn't support yet.
      * (i.e. only PMCR.N and bits [7:0] are mutable from userspace)
      * The LP bit is RES0 when FEAT_PMUv3p5 is not supported on the vCPU.
      * But, we leave the bit as it is here, as the vCPU's PMUver might
      * be changed later (NOTE: the bit will be cleared on first vCPU run
      * if necessary).
      */
     val &= ARMV8_PMU_PMCR_MASK;
  
     /* The LC bit is RES1 when AArch32 is not supported */
     if (!kvm_supports_32bit_el0())
         val |= ARMV8_PMU_PMCR_LC;
  
     __vcpu_sys_reg(vcpu, r->reg) = val;
     return 0;
 }

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◆ set_pmreg()

static int set_pmreg	(	struct kvm_vcpu *	vcpu,
		const struct sys_reg_desc *	r,
		u64	val
	)

static

Definition at line 1120 of file sys_regs.c.

 {
     bool set;
  
     val &= kvm_pmu_valid_counter_mask(vcpu);
  
     switch (r->reg) {
     case PMOVSSET_EL0:
         /* CRm[1] being set indicates a SET register, and CLR otherwise */
         set = r->CRm & 2;
         break;
     default:
         /* Op2[0] being set indicates a SET register, and CLR otherwise */
         set = r->Op2 & 1;
         break;
     }
  
     if (set)
         __vcpu_sys_reg(vcpu, r->reg) |= val;
     else
         __vcpu_sys_reg(vcpu, r->reg) &= ~val;
  
     return 0;
 }

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◆ set_wcr()

static int set_wcr	(	struct kvm_vcpu *	vcpu,
		const struct sys_reg_desc *	rd,
		u64	val
	)

static

Definition at line 782 of file sys_regs.c.

 {
     vcpu->arch.vcpu_debug_state.dbg_wcr[rd->CRm] = val;
     return 0;
 }

◆ set_wi_reg()

static int set_wi_reg	(	struct kvm_vcpu *	vcpu,
		const struct sys_reg_desc *	rd,
		u64	val
	)

static

Definition at line 1862 of file sys_regs.c.

 {
     return 0;
 }

◆ set_wvr()

static int set_wvr	(	struct kvm_vcpu *	vcpu,
		const struct sys_reg_desc *	rd,
		u64	val
	)

static

Definition at line 745 of file sys_regs.c.

 {
     vcpu->arch.vcpu_debug_state.dbg_wvr[rd->CRm] = val;
     return 0;
 }

◆ sve_visibility()

static unsigned int sve_visibility	(	const struct kvm_vcpu *	vcpu,
		const struct sys_reg_desc *	rd
	)

static

Definition at line 1639 of file sys_regs.c.

 {
     if (vcpu_has_sve(vcpu))
         return 0;
  
     return REG_HIDDEN;
 }

◆ sys_reg_to_index()

static u64 sys_reg_to_index ( const struct sys_reg_desc * reg )

static

Definition at line 3784 of file sys_regs.c.

 {
     return (KVM_REG_ARM64 | KVM_REG_SIZE_U64 |
         KVM_REG_ARM64_SYSREG |
         (reg->Op0 << KVM_REG_ARM64_SYSREG_OP0_SHIFT) |
         (reg->Op1 << KVM_REG_ARM64_SYSREG_OP1_SHIFT) |
         (reg->CRn << KVM_REG_ARM64_SYSREG_CRN_SHIFT) |
         (reg->CRm << KVM_REG_ARM64_SYSREG_CRM_SHIFT) |
         (reg->Op2 << KVM_REG_ARM64_SYSREG_OP2_SHIFT));
 }

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◆ trap_bcr()

static bool trap_bcr	(	struct kvm_vcpu *	vcpu,
		struct sys_reg_params *	p,
		const struct sys_reg_desc *	rd
	)

static

Definition at line 691 of file sys_regs.c.

 {
     u64 *dbg_reg = &vcpu->arch.vcpu_debug_state.dbg_bcr[rd->CRm];
  
     if (p->is_write)
         reg_to_dbg(vcpu, p, rd, dbg_reg);
     else
         dbg_to_reg(vcpu, p, rd, dbg_reg);
  
     trace_trap_reg(__func__, rd->CRm, p->is_write, *dbg_reg);
  
     return true;
 }

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◆ trap_bvr()

static bool trap_bvr	(	struct kvm_vcpu *	vcpu,
		struct sys_reg_params *	p,
		const struct sys_reg_desc *	rd
	)

static

Definition at line 654 of file sys_regs.c.

 {
     u64 *dbg_reg = &vcpu->arch.vcpu_debug_state.dbg_bvr[rd->CRm];
  
     if (p->is_write)
         reg_to_dbg(vcpu, p, rd, dbg_reg);
     else
         dbg_to_reg(vcpu, p, rd, dbg_reg);
  
     trace_trap_reg(__func__, rd->CRm, p->is_write, *dbg_reg);
  
     return true;
 }

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◆ trap_dbgauthstatus_el1()

static bool trap_dbgauthstatus_el1	(	struct kvm_vcpu *	vcpu,
		struct sys_reg_params *	p,
		const struct sys_reg_desc *	r
	)

static

Definition at line 565 of file sys_regs.c.

 {
     if (p->is_write) {
         return ignore_write(vcpu, p);
     } else {
         p->regval = read_sysreg(dbgauthstatus_el1);
         return true;
     }
 }

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◆ trap_dbgdidr()

static bool trap_dbgdidr	(	struct kvm_vcpu *	vcpu,
		struct sys_reg_params *	p,
		const struct sys_reg_desc *	r
	)

static

Definition at line 2732 of file sys_regs.c.

 {
     if (p->is_write) {
         return ignore_write(vcpu, p);
     } else {
         u64 dfr = IDREG(vcpu->kvm, SYS_ID_AA64DFR0_EL1);
         u64 pfr = IDREG(vcpu->kvm, SYS_ID_AA64PFR0_EL1);
         u32 el3 = !!SYS_FIELD_GET(ID_AA64PFR0_EL1, EL3, pfr);
  
         p->regval = ((SYS_FIELD_GET(ID_AA64DFR0_EL1, WRPs, dfr) << 28) |
                  (SYS_FIELD_GET(ID_AA64DFR0_EL1, BRPs, dfr) << 24) |
                  (SYS_FIELD_GET(ID_AA64DFR0_EL1, CTX_CMPs, dfr) << 20) |
                  (SYS_FIELD_GET(ID_AA64DFR0_EL1, DebugVer, dfr) << 16) |
                  (1 << 15) | (el3 << 14) | (el3 << 12));
         return true;
     }
 }

◆ trap_debug_regs()

static bool trap_debug_regs	(	struct kvm_vcpu *	vcpu,
		struct sys_reg_params *	p,
		const struct sys_reg_desc *	r
	)

static

Definition at line 604 of file sys_regs.c.

 {
     access_rw(vcpu, p, r);
     if (p->is_write)
         vcpu_set_flag(vcpu, DEBUG_DIRTY);
  
     trace_trap_reg(__func__, r->reg, p->is_write, p->regval);
  
     return true;
 }

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◆ trap_loregion()

static bool trap_loregion	(	struct kvm_vcpu *	vcpu,
		struct sys_reg_params *	p,
		const struct sys_reg_desc *	r
	)

static

Definition at line 504 of file sys_regs.c.

 {
     u64 val = IDREG(vcpu->kvm, SYS_ID_AA64MMFR1_EL1);
     u32 sr = reg_to_encoding(r);
  
     if (!(val & (0xfUL << ID_AA64MMFR1_EL1_LO_SHIFT))) {
         kvm_inject_undefined(vcpu);
         return false;
     }
  
     if (p->is_write && sr == SYS_LORID_EL1)
         return write_to_read_only(vcpu, p, r);
  
     return trap_raz_wi(vcpu, p, r);
 }

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◆ trap_oslar_el1()

static bool trap_oslar_el1	(	struct kvm_vcpu *	vcpu,
		struct sys_reg_params *	p,
		const struct sys_reg_desc *	r
	)

static

Definition at line 522 of file sys_regs.c.

 {
     u64 oslsr;
  
     if (!p->is_write)
         return read_from_write_only(vcpu, p, r);
  
     /* Forward the OSLK bit to OSLSR */
     oslsr = __vcpu_sys_reg(vcpu, OSLSR_EL1) & ~OSLSR_EL1_OSLK;
     if (p->regval & OSLAR_EL1_OSLK)
         oslsr |= OSLSR_EL1_OSLK;
  
     __vcpu_sys_reg(vcpu, OSLSR_EL1) = oslsr;
     return true;
 }

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◆ trap_oslsr_el1()

static bool trap_oslsr_el1	(	struct kvm_vcpu *	vcpu,
		struct sys_reg_params *	p,
		const struct sys_reg_desc *	r
	)

static

Definition at line 540 of file sys_regs.c.

 {
     if (p->is_write)
         return write_to_read_only(vcpu, p, r);
  
     p->regval = __vcpu_sys_reg(vcpu, r->reg);
     return true;
 }

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◆ trap_raz_wi()

static bool trap_raz_wi	(	struct kvm_vcpu *	vcpu,
		struct sys_reg_params *	p,
		const struct sys_reg_desc *	r
	)

static

Definition at line 480 of file sys_regs.c.

 {
     if (p->is_write)
         return ignore_write(vcpu, p);
     else
         return read_zero(vcpu, p);
 }

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◆ trap_undef()

static bool trap_undef	(	struct kvm_vcpu *	vcpu,
		struct sys_reg_params *	p,
		const struct sys_reg_desc *	r
	)

static

Definition at line 490 of file sys_regs.c.

 {
     kvm_inject_undefined(vcpu);
     return false;
 }

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◆ trap_wcr()

static bool trap_wcr	(	struct kvm_vcpu *	vcpu,
		struct sys_reg_params *	p,
		const struct sys_reg_desc *	rd
	)

static

Definition at line 766 of file sys_regs.c.

 {
     u64 *dbg_reg = &vcpu->arch.vcpu_debug_state.dbg_wcr[rd->CRm];
  
     if (p->is_write)
         reg_to_dbg(vcpu, p, rd, dbg_reg);
     else
         dbg_to_reg(vcpu, p, rd, dbg_reg);
  
     trace_trap_reg(__func__, rd->CRm, p->is_write, *dbg_reg);
  
     return true;
 }

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◆ trap_wvr()

static bool trap_wvr	(	struct kvm_vcpu *	vcpu,
		struct sys_reg_params *	p,
		const struct sys_reg_desc *	rd
	)

static

Definition at line 728 of file sys_regs.c.

 {
     u64 *dbg_reg = &vcpu->arch.vcpu_debug_state.dbg_wvr[rd->CRm];
  
     if (p->is_write)
         reg_to_dbg(vcpu, p, rd, dbg_reg);
     else
         dbg_to_reg(vcpu, p, rd, dbg_reg);
  
     trace_trap_reg(__func__, rd->CRm, p->is_write,
         vcpu->arch.vcpu_debug_state.dbg_wvr[rd->CRm]);
  
     return true;
 }

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◆ undef_access()

static bool undef_access	(	struct kvm_vcpu *	vcpu,
		struct sys_reg_params *	p,
		const struct sys_reg_desc *	r
	)

static

Definition at line 1334 of file sys_regs.c.

 {
     kvm_inject_undefined(vcpu);
  
     return false;
 }

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◆ unhandled_cp_access()

static void unhandled_cp_access	(	struct kvm_vcpu *	vcpu,
		struct sys_reg_params *	params
	)

static

Definition at line 3134 of file sys_regs.c.

 {
     u8 esr_ec = kvm_vcpu_trap_get_class(vcpu);
     int cp = -1;
  
     switch (esr_ec) {
     case ESR_ELx_EC_CP15_32:
     case ESR_ELx_EC_CP15_64:
         cp = 15;
         break;
     case ESR_ELx_EC_CP14_MR:
     case ESR_ELx_EC_CP14_64:
         cp = 14;
         break;
     default:
         WARN_ON(1);
     }
  
     print_sys_reg_msg(params,
               "Unsupported guest CP%d access at: %08lx [%08lx]\n",
               cp, *vcpu_pc(vcpu), *vcpu_cpsr(vcpu));
     kvm_inject_undefined(vcpu);
 }

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◆ vcpu_read_sys_reg()

u64 vcpu_read_sys_reg	(	const struct kvm_vcpu *	vcpu,
		int	reg
	)

Definition at line 128 of file sys_regs.c.

 {
     u64 val = 0x8badf00d8badf00d;
     u64 (*xlate)(u64) = NULL;
     unsigned int el1r;
  
     if (!vcpu_get_flag(vcpu, SYSREGS_ON_CPU))
         goto memory_read;
  
     if (unlikely(get_el2_to_el1_mapping(reg, &el1r, &xlate))) {
         if (!is_hyp_ctxt(vcpu))
             goto memory_read;
  
         /*
          * If this register does not have an EL1 counterpart,
          * then read the stored EL2 version.
          */
         if (reg == el1r)
             goto memory_read;
  
         /*
          * If we have a non-VHE guest and that the sysreg
          * requires translation to be used at EL1, use the
          * in-memory copy instead.
          */
         if (!vcpu_el2_e2h_is_set(vcpu) && xlate)
             goto memory_read;
  
         /* Get the current version of the EL1 counterpart. */
         WARN_ON(!__vcpu_read_sys_reg_from_cpu(el1r, &val));
         return val;
     }
  
     /* EL1 register can't be on the CPU if the guest is in vEL2. */
     if (unlikely(is_hyp_ctxt(vcpu)))
         goto memory_read;
  
     if (__vcpu_read_sys_reg_from_cpu(reg, &val))
         return val;
  
 memory_read:
     return __vcpu_sys_reg(vcpu, reg);
 }

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◆ vcpu_write_sys_reg()

void vcpu_write_sys_reg	(	struct kvm_vcpu *	vcpu,
		u64	val,
		int	reg
	)

Definition at line 172 of file sys_regs.c.

 {
     u64 (*xlate)(u64) = NULL;
     unsigned int el1r;
  
     if (!vcpu_get_flag(vcpu, SYSREGS_ON_CPU))
         goto memory_write;
  
     if (unlikely(get_el2_to_el1_mapping(reg, &el1r, &xlate))) {
         if (!is_hyp_ctxt(vcpu))
             goto memory_write;
  
         /*
          * Always store a copy of the write to memory to avoid having
          * to reverse-translate virtual EL2 system registers for a
          * non-VHE guest hypervisor.
          */
         __vcpu_sys_reg(vcpu, reg) = val;
  
         /* No EL1 counterpart? We're done here.? */
         if (reg == el1r)
             return;
  
         if (!vcpu_el2_e2h_is_set(vcpu) && xlate)
             val = xlate(val);
  
         /* Redirect this to the EL1 version of the register. */
         WARN_ON(!__vcpu_write_sys_reg_to_cpu(val, el1r));
         return;
     }
  
     /* EL1 register can't be on the CPU if the guest is in vEL2. */
     if (unlikely(is_hyp_ctxt(vcpu)))
         goto memory_write;
  
     if (__vcpu_write_sys_reg_to_cpu(val, reg))
         return;
  
 memory_write:
      __vcpu_sys_reg(vcpu, reg) = val;
 }

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◆ walk_one_sys_reg()

static int walk_one_sys_reg	(	const struct kvm_vcpu *	vcpu,
		const struct sys_reg_desc *	rd,
		u64 __user **	uind,
		unsigned int *	total
	)

static

Definition at line 3807 of file sys_regs.c.

 {
     /*
      * Ignore registers we trap but don't save,
      * and for which no custom user accessor is provided.
      */
     if (!(rd->reg || rd->get_user))
         return 0;
  
     if (sysreg_hidden_user(vcpu, rd))
         return 0;
  
     if (!copy_reg_to_user(rd, uind))
         return -EFAULT;
  
     (*total)++;
     return 0;
 }

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◆ walk_sys_regs()

static int walk_sys_regs	(	struct kvm_vcpu *	vcpu,
		u64 __user *	uind
	)

static

Definition at line 3830 of file sys_regs.c.

 {
     const struct sys_reg_desc *i2, *end2;
     unsigned int total = 0;
     int err;
  
     i2 = sys_reg_descs;
     end2 = sys_reg_descs + ARRAY_SIZE(sys_reg_descs);
  
     while (i2 != end2) {
         err = walk_one_sys_reg(vcpu, i2++, &uind, &total);
         if (err)
             return err;
     }
     return total;
 }

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◆ write_demux_regids()

static int write_demux_regids ( u64 __user * uindices )

static

Definition at line 3770 of file sys_regs.c.

 {
     u64 val = KVM_REG_ARM64 | KVM_REG_SIZE_U32 | KVM_REG_ARM_DEMUX;
     unsigned int i;
  
     val |= KVM_REG_ARM_DEMUX_ID_CCSIDR;
     for (i = 0; i < CSSELR_MAX; i++) {
         if (put_user(val | i, uindices))
             return -EFAULT;
         uindices++;
     }
     return 0;
 }

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◆ write_to_read_only()

static bool write_to_read_only	(	struct kvm_vcpu *	vcpu,
		struct sys_reg_params *	params,
		const struct sys_reg_desc *	r
	)

static

Definition at line 67 of file sys_regs.c.

 {
     return bad_trap(vcpu, params, r,
             "sys_reg write to read-only register");
 }

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Variable Documentation

◆ __ro_after_init

struct sys_reg_desc invariant_sys_regs [] __ro_after_init

static

Initial value:

= {
    { SYS_DESC(SYS_MIDR_EL1), NULL, get_midr_el1 },
    { SYS_DESC(SYS_REVIDR_EL1), NULL, get_revidr_el1 },
    { SYS_DESC(SYS_AIDR_EL1), NULL, get_aidr_el1 },
    { SYS_DESC(SYS_CTR_EL0), NULL, get_ctr_el0 },
}

Definition at line 3588 of file sys_regs.c.

◆ cp14_64_regs

const struct sys_reg_desc cp14_64_regs[]

static

Initial value:

= {
    
    { Op1( 0), CRm( 1), .access = trap_raz_wi },
 
    { Op1( 0), CRm( 2), .access = trap_raz_wi },
}

Definition at line 2732 of file sys_regs.c.

◆ cp14_regs

const struct sys_reg_desc cp14_regs[]

static

Definition at line 2732 of file sys_regs.c.

◆ cp15_64_regs

const struct sys_reg_desc cp15_64_regs[]

static

Initial value:

= {
    { Op1( 0), CRn( 0), CRm( 2), Op2( 0), access_vm_reg, NULL, TTBR0_EL1 },
    { CP15_PMU_SYS_REG(DIRECT, 0, 0, 9, 0), .access = access_pmu_evcntr },
    { Op1( 0), CRn( 0), CRm(12), Op2( 0), access_gic_sgi }, 
    { SYS_DESC(SYS_AARCH32_CNTPCT),       access_arch_timer },
    { Op1( 1), CRn( 0), CRm( 2), Op2( 0), access_vm_reg, NULL, TTBR1_EL1 },
    { Op1( 1), CRn( 0), CRm(12), Op2( 0), access_gic_sgi }, 
    { Op1( 2), CRn( 0), CRm(12), Op2( 0), access_gic_sgi }, 
    { SYS_DESC(SYS_AARCH32_CNTP_CVAL),    access_arch_timer },
    { SYS_DESC(SYS_AARCH32_CNTPCTSS),     access_arch_timer },
}

Definition at line 2732 of file sys_regs.c.

◆ cp15_regs

const struct sys_reg_desc cp15_regs[]

static

Definition at line 2732 of file sys_regs.c.

◆ first_idreg

const struct sys_reg_desc* first_idreg

static

Definition at line 2730 of file sys_regs.c.

◆ sys_reg_descs

const struct sys_reg_desc sys_reg_descs[]

static

Definition at line 2165 of file sys_regs.c.

Macros

Functions

Variables

Macro Definition Documentation

◆ __PTRAUTH_KEY

◆ AA32_ID_SANITISED

◆ AMU_AMEVCNTR0_EL0

◆ AMU_AMEVCNTR1_EL0

◆ AMU_AMEVTYPER0_EL0

◆ AMU_AMEVTYPER1_EL0

◆ CP15_PMU_SYS_REG

◆ CSSELR_MAX

◆ DBG_BCR_BVR_WCR_WVR

◆ DBG_BCR_BVR_WCR_WVR_EL1

◆ DBGBXVR

◆ EL12_REG

◆ EL2_REG

◆ EL2_REG_REDIR

◆ EL2_REG_VNCR

◆ FUNCTION_INVARIANT

◆ ID_DESC

◆ ID_HIDDEN

◆ ID_REG_LIMIT_FIELD_ENUM

◆ ID_SANITISED

◆ ID_UNALLOCATED

◆ ID_WRITABLE

◆ KVM_ARM_FEATURE_ID_RANGE_INDEX

◆ MAPPED_EL2_SYSREG

◆ MTE_REG

◆ PMU_PMEVCNTR

◆ PMU_PMEVCNTR_EL0

◆ PMU_PMEVTYPER

◆ PMU_PMEVTYPER_EL0

◆ PMU_SYS_REG

◆ PTRAUTH_KEY

◆ PURE_EL2_SYSREG

Function Documentation

◆ __kvm_read_sanitised_id_reg()

◆ aa32_id_visibility()

◆ access_actlr()

◆ access_arch_timer()

◆ access_ccsidr()

◆ access_clidr()

◆ access_csselr()

◆ access_ctr()

◆ access_dcgsw()

◆ access_dcsw()

◆ access_elr()

◆ access_gic_sgi()

◆ access_gic_sre()

◆ access_id_reg()

◆ access_pmceid()

◆ access_pmcnten()

◆ access_pmcr()

◆ access_pminten()

◆ access_pmovs()

◆ access_pmselr()

◆ access_pmswinc()

◆ access_pmu_evcntr()

◆ access_pmu_evtyper()

◆ access_pmuserenr()

◆ access_rw()

◆ access_sp_el1()

◆ access_spsr()

◆ access_vm_reg()

◆ arm64_check_features()

◆ bad_redir_trap()

◆ bad_trap()

◆ bad_vncr_trap()

◆ check_pmu_access_disabled()

◆ check_sysreg_table()

◆ copy_reg_to_user()

◆ dbg_to_reg()

◆ demux_c15_get()

◆ demux_c15_set()

◆ el2_visibility()

◆ emulate_cp()

◆ emulate_sys_reg()

◆ get_access_mask()

◆ get_bcr()